Topic
Fault indicator
About: Fault indicator is a research topic. Over the lifetime, 10057 publications have been published within this topic receiving 143482 citations. The topic is also known as: FCI & power line fault indicator.
Papers published on a yearly basis
Papers
More filters
•
11 Dec 2001TL;DR: In this article, the authors present a protection device for an electrical circuit having a load, which includes a sensor operatively associated with the electrical circuit to sense current changes and voltage fluctuations in the electrical circuits.
Abstract: A protection device for an electrical circuit having a load includes a sensor operatively associated with the electrical circuit to sense current changes and voltage fluctuations in the electrical circuit. A detector receives input from the sensor and compares the input to known arc fault signatures and arc fault mimicking signatures to determine what category of arc fault or mimicked arc fault occurs. The detector then produces an encoded output signal indicative of the category of arc fault or mimicked arc fault. Categories of arc faults include upstream or downstream series, downstream parallel, downstream line to line, and downstream line to ground.
49 citations
••
TL;DR: The use of McCluskey and Clegg's characterization of faulty networks by evaluating the functional equivalence classes of the network is a way to reduce the amount of computation involved and use a probabilistic model of logical circuits.
Abstract: The paper discusses two methods to evaluate the signal reliability of the output of logical circuits. It is known that faults present in a circuit will not always cause the output of the circuit to be incorrect. Given the probability of faults occurring in the circuit and the probabilities of the input combinations, it is possible to determine the likelihood of the output being correct. The signal reliability of the output is thus defined as the probability that the circuit output is correct. The first method evaluates the contribution of each fault to the reliability of the circuit and requires the enumeration of the behavior of each fault in the entire fault set. The use of McCluskey and Clegg's characterization of faulty networks by evaluating the functional equivalence classes of the network is a way to reduce the amount of computation involved. Lower bounds can be obtained by considering a restricted fault set, for example, the single fault set. The second method uses a probabilistic model of logical circuits and consists of straightforward operations which can easily be automated. The method also yields the signal reliability and has the capability of very easily specifying the individual fault probabilities of all the circuit lines independently.
49 citations
••
TL;DR: In this article, a low cost, fast and reliable microcontroller based protection scheme using wavelet transform and artificial neural network has been proposed and its effectiveness evaluated in real-time.
48 citations
••
TL;DR: In this paper, a neural-fuzzy network is used to model the thermal condition of the power transformer in fault-free operation and the output of the neural fuzzy network is compared to measurements from the power transform and the obtained residuals undergo statistical processing according to a fault detection and isolation algorithm.
48 citations
••
07 Jul 2008TL;DR: A new SystemC-based fault injection technique that has improved fault representation in visible and on-the-fly data and signal registers is proposed that has fast simulation speed, better fault representation, while maintaining simplicity and minimum intrusion.
Abstract: In this paper, we propose a new SystemC-based fault injection technique that has improved fault representation in visible and on-the-fly data and signal registers. The technique is minimum intrusive since it only requires replacing the original data or signal types to fault injection enabler types. We compare the proposed simulation technique with recently reported SystemC-based techniques and show that our technique has fast simulation speed, better fault representation, while maintaining simplicity and minimum intrusion. We demonstrate fault injection capabilities in a behavioural SystemC description of MPEG-2 decoder using proposed technique and show that up to 98.9% fault representation within data and signal registers can be achieved.
48 citations