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Fault indicator

About: Fault indicator is a research topic. Over the lifetime, 10057 publications have been published within this topic receiving 143482 citations. The topic is also known as: FCI & power line fault indicator.


Papers
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Journal ArticleDOI
TL;DR: It will be shown that conventional memory tests do not necessarily detect its dynamic faulty behavior, which has been shown to exist in real designs, and the paper also presents new memory tests to target the dynamic fault class.
Abstract: The ever increasing trend to reduce DPM levels of memories requires tests with very high fault coverage and low cost. This paper describes an important fault class, called dynamic faults, that cannot be ignored anymore. The dynamic fault behavior can take place in the absence of the static fault behavior, for which the conventional memory tests have been constructed. The concept of dynamic fault will be established and validated for both dynamic and static Random-Access-Memories. A systematic way to develop fault models for dynamic faults will be introduced. Further, it will be shown that conventional memory tests do not necessarily detect its dynamic faulty behavior, which has been shown to exist in real designs. The paper therefore also presents new memory tests to target the dynamic fault class.

48 citations

Patent
01 Jul 2008
TL;DR: A hub device, memory system, and method for providing a cascade interconnect memory system with enhanced reliability is described in this article, where the hub device includes an interface to a high-speed bus for communicating with a memory controller.
Abstract: A hub device, memory system, and method for providing a cascade interconnect memory system with enhanced reliability The hub device includes an interface to a high-speed bus for communicating with a memory controller The memory controller and the hub device are included in a cascade interconnect memory system and the high-speed bus includes bit lanes and one or more clock lanes The hub device also includes a bi-directional fault signal line in communication with the memory controller and readable by a service interface The hub device also includes a fault isolation register (FIR) for storing information about failures detected at the hub device, the information including severity levels of the detected failures In addition, the hub device includes error recovery logic for responding to a failure detected at the hub device Responding to the error includes recording a severity level of the failure in the FIR and taking an action at the hub device that is responsive to the severity level of the failure The action includes one or more of fast clock stop, setting the bi-directional fault indicator, setting cyclical redundancy code (CRC) bits and transmitting them to the memory controller, re-try, sparing out a bit lane and sparing out a clock lane

48 citations

Journal ArticleDOI
TL;DR: In this paper, artificial neural networks are used to recognize the causes of faults in power distribution systems, based on fault currents information collected for each outage, and the methodology and implementation of neural networks and fuzzy logic for the identification of animal-caused distribution faults are presented.
Abstract: Artificial neural networks are used to recognize the causes of faults in power distribution systems, based on fault currents information collected for each outage. Actual field data are used. The methodology and implementation of neural networks and fuzzy logic for the identification of animal-caused distribution faults are presented. Satisfactory results are obtained, and the developed methodology can be easily generalized and used to identify other causes of faults in power distribution systems. >

48 citations

Journal ArticleDOI
TL;DR: A simulator for resistive-bridging and stuck-at faults based on electrical equations rather than table look up is presented, thus, exposing more flexibility and interaction of fault effects in current time frame and earlier time frames is elaborated on.
Abstract: The authors present a simulator for resistive-bridging and stuck-at faults. In contrast to earlier work, it is based on electrical equations rather than table look up, thus, exposing more flexibility. For the first time, simulation of sequential circuits is dealt with; interaction of fault effects in current time frame and earlier time frames is elaborated on for different bridge resistances. Experimental results are given for resistive-bridging and stuck-at faults in combinational and sequential circuits. Different definitions of fault coverage are listed, and quantitative results with respect to all these definitions are given for the first time

48 citations

Journal ArticleDOI
TL;DR: In this article, a fuzzy logic based algorithm using discrete wavelet transform is developed for identifying the various faults in the electrical distribution system for an unbalanced distribution electrical power system, which is capable to identify the ten different types of faults with negligible effect of variation in fault inception angle, loading and other parameters of the power distribution system.

48 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202381
2022215
202127
202061
2019116
2018160