Fault indicator

About: Fault indicator is a research topic. Over the lifetime, 10057 publications have been published within this topic receiving 143482 citations. The topic is also known as: FCI & power line fault indicator.

Hierarchical simulation approach to accurate fault modeling for system dependability evaluation

Abstract: This paper presents a hierarchical simulation methodology that enables accurate system evaluation under realistic faults and conditions. In this methodology, effects of low-level (i.e., transistor or circuit level) faults are propagated to higher levels (i.e., system level) using fault dictionaries. The primary fault models are obtained via simulation of the transistor-level effect of a radiation particle penetrating a device. The resulting current bursts constitute the first-level fault dictionary and are used in the circuit-level simulation to determine the impact on circuit latches and flip-flops. The latched outputs constitute the next level fault dictionary in the hierarchy and are applied in conducting fault injection simulation at the chip-level under selected workloads or application programs. Faults injected at the chip-level result in memory corruptions, which are used to form the next level fault dictionary for the system-level simulation of an application running on simulated hardware. When an application terminates, either normally or abnormally, the overall fault impact on the software behavior is quantified and analyzed. The system in this sense can be a single workstation or a network. The simulation method is demonstrated and validated in the case study of Myrinet (a commercial, high-speed network) based network system.

Wide-Area Protection Fault Identification Algorithm Based on Multi-Information Fusion

Abstract: Wide-area protection systems can be used to avoid complicated setting coordination of traditional backup relays and effectively prevent cascading trip events. Since they depend on a multisource data of transmission network to identify a faulted element, fault-tolerance capacity of the system is required. This paper proposes a faulted element identification algorithm based on multisource information fusion for wide-area protection. A fault identification encoding method based upon grid topology is presented. Meanwhile, the operation information of traditional primary/backup relays and the status of breakers are utilized to establish fitness function and state expectation function. The fitness of protected elements is used to determine their fault probability; and faulted elements are identified with high fault tolerance. The property of the presented algorithm is validated by simulation tests based on an IEEE 10-generator 39-bus system.

Current Limiting Device - A Utility's Need

Abstract: Dramatic growth of today's utility systems is causing fault currents to exceed circuit breaker capabilities at existing major stations. Moreover, mathematical projections indicate that this trend will continue at an accelerated rate. Development of a device to limit the instantaneous magnitude of the fault currents to predetermined levels is actively being pursued. This paper discusses the need and application of such a current limiting device.

Fault indicator having delayed trip circuit

Abstract: A reset coordinated fault indicator for indicating the occurrence of a fault current in a monitored conductor includes an electrically actuated indicator flag. A trip circuit within the fault indicator impulses the indicator flag from a normal reset-indicating state to a fault-indicating state following the occurrence of a fault current in the conductor. A reset circuit periodically impulses the indicator flag to the reset-indicating state upon restoration of power to the conductor. To preclude simultaneous actuation of the trip and reset circuits and consequent failure of the indicator flag to register a fault, the trip circuit, upon the occurrence of a fault, first actuates the reset circuit to render the reset circuit inoperative, and then actuates the indicator flag to provide a fault indication.

Diagnosing multiple faults using knowledge about malfunctioning behavior

Abstract: A technical fault diagnosis system based on knowledge about the structure of a device and the behavior of its components is presented. This approach allows knowledge about components to be reused for new devices and simplifies maintenance of the fault diagnosis system. A new method for diagnosing multiple faults using this representation is presented and discussed. The method assumes that both normal functioning and malfunctioning behavior are described for components in the form of user-defined constraints. A prototype implementation for parts of the method exists and has been compared with a traditional fault-tree implementation of a trouble-shooting system for an separator application.