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Fault indicator

About: Fault indicator is a research topic. Over the lifetime, 10057 publications have been published within this topic receiving 143482 citations. The topic is also known as: FCI & power line fault indicator.


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Journal ArticleDOI
TL;DR: In this paper, a fault location algorithm for parallel transmission lines using two terminal currents is proposed, which is based on the fact that the difference between voltage distributions, calculated from two terminals currents, is the smallest at fault point.
Abstract: This paper presents a novel time-domain fault location algorithm for parallel transmission lines using two terminal currents. Parallel transmission lines with faults can be decoupled into the common component net and differential component net. Since the differential component net is only composed of the parallel lines and its terminal voltages equal zero, the proposed algorithm is based on the fact that the difference between voltage distributions, calculated from two terminal currents, is the smallest at fault point. To be practical, unsynchronized data and the transient transferring ability of the current transformer are taken into consideration. The algorithm needs a very short data window, and any segment of current data can be used to locate faults. The proposed algorithm is verified successfully using the simulation data generated by the frequency-dependent line model of the Alternative Transients Program and the field recording data provided by traveling-wave fault locators. Locating results show the satisfactory accuracy of the algorithm for various fault types, fault distances, and fault resistances.

101 citations

Journal ArticleDOI
TL;DR: A new fault location system for multi-terminal single transmission lines and an algorithm for synchronizing the asynchronous sampling data is presented and EMTP simulation results are presented.
Abstract: Conventional fault location systems which use one-terminal AC voltages and currents are difficult to apply to multi-terminal power systems. This paper discusses a new fault location system for multi-terminal single transmission lines. Asynchronous sampling at each terminal is preferred in order to simplify the transmission equipment and an algorithm for synchronizing the asynchronous sampling data is presented. Another algorithm is presented which converts the original multi-terminal power system by progressive conversion to a system with one fewer terminals to arrive at a 2-terminal system containing the fault. An effective fault locating system can be constructed by combining these algorithms with existing reactive power locating operations. EMTP simulation results are presented. >

101 citations

Journal ArticleDOI
TL;DR: In this article, the authors used the telegraph equations as a line model, voltage and current samples taken at one end of a line within the first 5 ms of fault inception are used to generate instantaneous voltage and currents profiles for the rest of the transmission line.
Abstract: The high frequency components in fault waveforms present undesirable effects to most fault location algorithms and as a consequence filtering of postfault signals, to remove the high frequency transients, is essential for accurate fault location. A fault location algorithm that derives from travelling wave principles can cope with high frequency transients since these basically depend on travelling wave phenomena. The development of such an algorithm is the objective of this paper. Using the telegraph equations as a line model, voltage and current samples taken at one end of a line within the first 5 ms of fault inception are used to generate instantaneous voltage and current profiles for the rest of the transmission line. The voltage and current estimation is based on the solution of the equations of the line model by the method of characteristics. Criteria functions involving any of the square of the voltage, the square of the current, or the product of the two are applied for determination of the fault position. Fault position is given by the peak variation in tangent to the above basic functions. The algorithm finds application in fault location on two and three-terminal networks at both transmission and distribution levels.

101 citations

Journal ArticleDOI
TL;DR: In this article, a fault detection algorithm using the spread spectrum time-domain reflectometry (SSTDR) method has been introduced, which can detect PV ground faults for different configurations of PV arrays (single and double strings) and fault resistances (0.5, 5, and 10-Omega$ ).
Abstract: A healthy photovoltaic (PV) array has a specific impedance between node pairs, and any ground fault changes the impedance values. Reflectometry is a well-known technique in electromagnetics, and it could be exploited to detect fault and aging-related impedance variations in a PV system. A fault detection algorithm using the spread spectrum time-domain reflectometry (SSTDR) method has been introduced in this paper. SSTDR has been successfully used for detecting and locating aircraft wiring faults. However, the wide variation in impedance throughout the entire PV system, which is caused by the use of different materials and interconnections makes PV fault detection more challenging while using reflectometry. Unlike other conventional ground-fault detection techniques specifically developed for PV arrays, SSTDR does not depend on fault-current magnitudes. Therefore, SSTDR can be used even in the absence of the solar irradiation, which makes it a very powerful fault-detection tool. The proposed PV ground-fault detection technique has been tested in a real-world PV system, and it can confidently detect PV ground faults for different configurations of PV arrays (single and double strings) and fault resistances (0.5, 5, and 10- $\Omega$ ). Moreover, it has been experimentally verified that our proposed algorithm works at low irradiance and can detect specific ground faults that may remain undetected using the conventional ground-fault detection and interrupter (GFDI) fuses.

101 citations

01 Jan 2005
TL;DR: A practical implementation of a fault attack implemented on a Silvercard (a freely available smart card based on a PIC16F877 produced by Microchip) to effectively reduce the number of rounds of a secret key algorithm.
Abstract: This paper presents a practical implementation of a fault attack implemented on a Silvercard (a freely available smart card based on a PIC16F877 produced by Microchip). The aim of the fault attack is to effectively reduce the number of rounds of a secret key algorithm. The simplest case of reducing the number of rounds to one was chosen to facilitate subsequent cryptanalysis. The fault injection method used is a glitch on the power supplied to the smart card. The manner in which this changes the functioning of the smart card is described, followed by how this effect can then be used to produce the desired result. A description of how this was applied to an AES implementation is given. Lastly, Various generic countermeasures are discussed to show how this type of attack can be prevented.

101 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202381
2022215
202127
202061
2019116
2018160