Fault indicator

About: Fault indicator is a research topic. Over the lifetime, 10057 publications have been published within this topic receiving 143482 citations. The topic is also known as: FCI & power line fault indicator.

Ground Fault Detection and Location for Ungrounded DC Traction Power Systems

Abstract: A fault protection and location method for ungrounded dc traction power systems is presented in this paper. Many dc traction power systems have an ungrounded power circuit to increase the leakage path resistance. Although ungrounded systems can continue operating with a single ground contact, unlike solid- or low-resistance grounded systems, because of the very low fault current, a second ground fault in another pole will result in a line-to-line fault that could cause significant system damage. However, it is difficult to detect the first ground contact due to the low ground current and even harder to locate because it can be seen by many detectors in the network. The proposed scheme in this paper uses a probe unit to detect and locate the first single ground fault in ungrounded traction power systems. The probe unit applies probe voltage to detect the fault and, once the fault is detected, analyzes the response to dc or swept-frequency ac probe voltage to locate the fault. The proposed concepts have been verified with computer simulations and hardware experiments and demonstrated a successful performance.

Fault locating in ungrounded and high-resistance grounded systems

Abstract: One of the most common and difficult problems to solve in industrial power systems is the location and elimination of the ground fault. Ground faults that occur in ungrounded and high-resistance grounded systems do not draw enough current to trigger circuit breaker or fuse operation, making them difficult to localize. Techniques currently used to track down faults are time consuming and cumbersome. A new approach developed for ground-fault localization on ungrounded and high-resistance grounded low-voltage systems is described. The system consists of a novel ground-fault relay that operates in conjunction with low-cost fault indicators permanently mounted in the circuit. The ground-fault relay employs digital signal processing techniques to detect the fault, identify the faulted phase, and measure the electrical distance away from the substation. The remote fault indicators are used to visually indicate where the fault is located. The resulting system provides a fast, easy, economical, and safe detection system for ground-fault localization.

FPGA-Based Fast Detection With Reduced Sensor Count for a Fault-Tolerant Three-Phase Converter

Abstract: Fast fault detection (FD) and reconfiguration is necessary for fault tolerant power electronic converters in safety critical applications to prevent further damage and to make the continuity of service possible. The aim of this study is to minimize the number of the used additional voltage sensors in a fault tolerant three-phase converter. In this paper, first a practical implementation of a very fast FD scheme with reduced sensor number is discussed. Then, an optimization in this scheme is also presented to decrease the detection time. For FD, special time and voltage criterion are applied to observe the error in the estimated phase-to-phase voltages for a specific period of time. The proposed optimization is based on the fact that following a detectable fault, two line-to-line voltages will deviate from their respective estimated values. Fault detection is studied for a three-leg two-level fault tolerant converter. Control and FD systems are implemented on a single field-programmable gate array. First, hardware in the loop experiments are carried out to evaluate the implemented schemes. Then, fully experimental tests are performed. The results confirm good performance of the proposed detection schemes, the digital controller and the fault tolerant structure. It is shown that such methods can detect and locate a fault in a few tens of microseconds. In certain cases the optimized scheme can be faster up to 50%, and in the other cases they have the same detection time.

Classification and test generation for path-delay faults using single stuck-fault tests

Abstract: In this paper, we classify path-delay faults into three categories: singly-testable (ST), multiply-testable (MT), and singly-testable dependent (ST-dependent). All ST faults are guaranteed detection in the case of a single fault, and some may be guaranteed detection through robust and validatable non-robust tests even in the case of multiple faults. An ST-dependent fault can affect the circuit speed only if certain ST faults are present. Thus, if the ST faults are tested, the ST-dependent faults need not be tested. MT faults cannot be guaranteed detection, but affect the speed only if delay faults simultaneously exist on a set of paths none of which is ST. We classify all path-delay faults into the three categories by a procedure using any unaltered single stuck fault test generation tool. We use only two runs of this tool on a network derived from the original network. As a by-product of this process, we generate single and multiple input change delay tests for all testable faults. With these tests, we expect that most defective circuits are identified. Examples and results on ISCAS'89 benchmarks are presented.

A Nand Model ror Fault Diagnosis in Combinational Logic Networks

Abstract: A network model colled the normal NAND model is introduced for the study of fault diagnosis in combinational logic circuits. It is shown that every network can be transformed into an equivalent normal NAND network from which all the information pertaining to the diagnosis of the original network con be obtained. The use of this model greatly simplifies fault analysis and test generation.