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Fault (power engineering)

About: Fault (power engineering) is a research topic. Over the lifetime, 119772 publications have been published within this topic receiving 981679 citations.


Papers
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Proceedings Article
01 Jan 1985
TL;DR: A procedure is described which identifies paths which are tested for path faults by a set of patterns, independent of the delays of any individual gate of the network, which is a global delay fault model.
Abstract: Delay testing of combinational logic in a clocked environment is analyzed. A model based upon paths is introduced for delay faults. Any path with a total delay exceeding the clock interval is called a "path fault." This is a global delay fault model because it is associated with an entire path. The more familiar slow-to-rise or slow-to-fall gate delay fault, on the other hand, is a local fault model. A procedure is described which identifies paths which are tested for path faults by a set of patterns. It does not involve delay simulation. The paths so identified are tested for path faults independent of the delays of any individual gate of the network.

762 citations

Journal ArticleDOI
01 Jun 2003
TL;DR: In this paper, the authors compared the output voltage and current space in terms of dq components for each topology and fault, and used a silicon overrating cost factor to compare the relative switching device costs of the topologies compared to a standard three-phase inverter.
Abstract: This paper compares the many fault tolerant three-phase ac motor drive topologies that have been proposed to provide output capacity for the inverter faults of switch short or open-circuits, phase-leg short-circuits, and single-phase open-circuits. Also included is a review of the respective control methods for fault tolerant inverters including two-phase and unipolar control methods. The output voltage and current space in terms of dq components is identified for each topology and fault. These quantities are then used to normalize the power capacity of each system during a fault to a standard inverter during normal operation. A silicon overrating cost factor is adopted as a metric to compare the relative switching device costs of the topologies compared to a standard three-phase inverter.

750 citations

Journal ArticleDOI
TL;DR: In this article, the authors proposed a new approach to design robust (in the disturbance de-coupling sense) fault detection filters which ensure that the residual vector, generated by this filter, has both robust and directional properties.
Abstract: Fault detection filters are a special class of observers that can generate directional residuals for the purpose of fault isolation. This paper proposes a new approach to design robust (in the disturbance de-coupling sense) fault detection filters which ensure that the residual vector, generated by this filter, has both robust and directional properties. This is done by combining the unknown input observer and fault detection filter principles. The paper proposes a new full-order unknown input observer, and gives necessary and sufficient conditions for its existence. After the disturbance de-coupling conditions are satisfied, the remaining design freedom can be used to make the residual have the directional property, based on the fault detection filter principle. A nonlinear jet engine system is used to illustrate the robust fault isolation approach presented. It is shown that linearization errors can be approximately treated as unknown disturbances and be de-coupled in the design of a robust fault detect...

748 citations

Journal ArticleDOI
Bin Lu1, S.K. Sharma1
TL;DR: In this article, the authors present a survey on existing methods for fault diagnosis and protection of insulated gate bipolar transistors with special focus on those used in three-phase power inverters.
Abstract: This paper presents a survey on existing methods for fault diagnosis and protection of insulated gate bipolar transistors with special focus on those used in three-phase power inverters. Twenty-one methods for open-circuit faults and ten methods for short-circuit faults are evaluated and summarized, based on their performance and implementation efforts. The gate-misfiring faults and their diagnostic methods are also briefly discussed. Finally, the promising methods are recommended for future work.

732 citations

Journal ArticleDOI
TL;DR: This is the second-part paper of the survey on fault diagnosis and fault-tolerant techniques, where fault diagnosis methods and applications are overviewed, respectively, from the knowledge-based and hybrid/active viewpoints.
Abstract: This is the second-part paper of the survey on fault diagnosis and fault-tolerant techniques, where fault diagnosis methods and applications are overviewed, respectively, from the knowledge-based and hybrid/active viewpoints. With the aid of the first-part survey paper, the second-part review paper completes a whole overview on fault diagnosis techniques and their applications. Comments on the advantages and constraints of various diagnosis techniques, including model-based, signal-based, knowledge-based, and hybrid/active diagnosis techniques, are also given. An overlook on the future development of fault diagnosis is presented.

722 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2022205
20215,455
20207,904
20199,944
20188,526
20177,614