Showing papers on "FET amplifier published in 1975"

The “barrier mode” behaviour of a junction FET at low drain currents

Abstract: The behaviour of a junction FET with a gate-source reverse bias exceeding the pinch-off voltage is discussed. It is seen that both the transfer and output characteristics have an exponential character, and this is attributed to the presence of a potential barrier between the source and drain. Simple expressions are given for both the conductance and transconductance in terms of parameters which, in the case of long gate devices, may be evaluated analytically, or, in the case of short gate devices, evaluated numerically using a relatively simple computer model.

Microwave GaAs FET amplifier circuit

Abstract: A network is coupled to the gate electrode of a FET for generating a negative gate electrode voltage having a selected nominal value for minimizing intermodulation distortion of the FET and/or a value varying with respect to the nominal value directly proportional to temperature changes to provide a constant gain for the FET.

Power amplifier using a plurality of parallel connected amplifier elements and having burn-out protection

Abstract: A power amplifier includes a plurality of generally identical amplifier elements connected in parallel between input and output transmission lines for phase coherent addition of the signal outputs of each amplifier element. Resistive elements are connected across normally phase identical points on the transmission lines. If the amplifier becomes electrically unbalanced, power is absorbed in the resistive elements, thus protecting the amplifier elements.

Parameter independent FET sense amplifier

Abstract: A high speed ratioless FET sense amplifier for sensing stored information in a semiconductor memory system. The amplifier is capable of sensing very small voltage signals provided by charges stored in a plurality of single FET/capacitor memory cells. The amplifier comprises a pair of cross-coupled FET devices coupled to a pair of bit/sense lines by clock signal responsive switching devices. The source electrodes of the cross-coupled FETs are each independently capacitively coupled to another clock signal and also to a source of low potential through a pair of clock driven source pull-down FETs. The amplifier uses minimal size devices and is process parameter independent.

Microwave Octave-Band GaAs FET Amplifiers

Abstract: The design of microwave broadband amplifiers using the 1mu-gate GaAs field-effect transistors covering the 4-8 GHz and 7-14 GHz octave bands is presented. The broadband matching networks of these amplifiers consist of lumped and/or distributed circuit elements. Using analytical and computer-aided optimization techniques, a typical octave-band amplifier has been designed with a nominal power gain of 8 dB with a maximum deviation of /spl plusmn/0.07dB covering the 7-14 GHZ band based on the measured scattering parameters of a 1mu GaAs FET chip. For a packaged 1mu GaAs FET, a 4-8 GHZ band amplifier has been designed with a gain of 7.2 dB /spl plusmn/ 0.2 dB.

Logarithmic amplifier with temperature compensation means

Abstract: In a logarithmic amplifier employing a log-diode connected across an operational amplifier, a dividing resistor and a transistor circuit are connected in parallel between the output of the operational amplifier and the log-diode The temperature characteristic of the log-diode and that of the transistor circuit cancel each other to effect temperature compensation in the output of the operational amplifier

Loudspeaker and amplifier protection circuit

Abstract: In a signal receiver having a potential source and an amplifier stage connected to a loudspeaker, a loudspeaker and amplifier protection circuit includes a normally closed switch coupling the potential source to the amplifier stage and a protection circuit coupled to the output of the amplifier stage and responsive to positive or negative polarity DC potentials for activating the switch to disconnect the power supply from the amplifier stage.

Amplifier with FET having gate leakage current limitation

Abstract: An amplifier having at least a drive stage and an output stage, the output stage comprised of an FET for applying an amplified signal to a load. The drive stage includes a transistor device whose output is direct coupled to the gate electrode of the FET, the transistor device being supplied with an input signal to be amplified. A constant current source is coupled to the output of the transistor device, and thus to the gate electrode of the FET, and provides a current of predetermined magnitude to thus limit the gate leakage current during periods that the FET is cut off.

A feedforward S-band MIC amplifier system

Abstract: A 2.2 GHz high-power feedforward amplifier system has been designed and fabricated, which has an RF gain of 30 dB and delivers an output power of 1.25 W with all IM distortion products at least down 50 dB from the carrier level. The power amplifiers and passive circuit components used in this system are all realised in thin-film hybrid form. The theoretical development of the system is described. The result of the temperature stability tests is given. The computer optimisation technique with multiband weighting functions used throughout the amplifier design process is presented. Finally, practical applications and a comparison of the advantages and drawbacks of this (feedforward) amplifier system with those produced by using the conventional (back-off) approach are discussed.

Unmatched field effect transistors providing matched voltage-controlled resistances

Abstract: Matched voltage-controlled resistances are provided across the drain-to-source channels of a pair of FET's, each FET having a gate electrode connected through an associated control resistor to the same one terminal of a source of DC control voltage; having a source electrode electrically connected to the same other terminal of the voltage source; and having an associated feedback resistor electrically connected between its drain and gate electrodes. The drain electrodes are preferably capacitively coupled to input or output terminals to prevent DC loading of the FET network by external circuitry. A resistor is also connected across the drain-to-source channel of each FET to limit the maximum value of net resistance presented thereby. The resistance of one of the control resistors is adjusted to have a value which causes the net drain-to-source resistance of the associated FET to have the same value as that of the other FET for a particular value of control voltage. The net drain-to-source resistances of the two FET's are then closely matched over a range of control voltages.

High-reliability power amplifier

Abstract: A high-reliability power amplifier employs passive automatic switching between parallel amplifier channels to provide a constant output power level, which is independent of the failure of an individual channel. The reliability of the amplifier network is improved by amplifying the input signal through parallel channels. Passive switching between channels and a constant level of power output are provided through a hybrid junction.

Compound transistor circuitry

Abstract: A compound transistor circuitry comprises a non-saturation type first field effect transistor and a saturation type second field effect transistor which is direct-coupled to the source circuit of said first FET. The internal dynamic resistance of the second FET functions as a negative feed-back element for the first FET. This internal dynamic resistance will greatly increase when the drain current of the second FET saturates. As a result, the compound transistor circuitry presents an output characteristic closely resembling that of the first FET within the operative range where the second FET does not saturate, whereas the circuitry presents an output characteristic that the current saturates at a level substantially equal to the saturating current of the second FET within the operative range where the second FET saturates.

Push-pull amplifier circuitry

Abstract: A push-pull amplifier circuitry comprising: a first and a second FET (abbreviation of field effect transistor which will be used hereinafter) of an n-channel type, a third FET of a p-channel type with its gate and source connected to the gate of said first FET and to the source of said second FET respectively, a fourth FET of a p-channel type having a gate and a source connected to the gate of said second FET and to the source of said first FET, a positive voltage supply connected to the drain of said first FET and via a resistor to the drain of said second FET and, a negative voltage supply connected to the drain of said third FET and via another resistor to the drain of said fourth FET. This circuitry is suitable for use as an input stage or an interstage amplifier circuit such as a pre-driver of a multistage direct-coupled push-pull amplifier.

Resistance read amplifier

Abstract: Resistance read amplifier in which a resistor the resistance of which is to be determined is connected by an electronic selection switch to a constant-current source which at the same time switches an associated output amplifier into circuit.

Distance-related variable gain amplifier

Abstract: Apparatus for electrically communicating between a given location and a variably spaced apart remote location, the locations being connected via electrical conductors. A variable gain amplifier is connected in series between the spaced apart locations for variably amplifying the signals communicated therebetween. A gain control signal that is a function of the separation between the locations is generated and applied to the variable gain amplifier to vary the gain of the amplifier in accordance with the distance between the locations. The gain control signal is proportional to the effective resistance of the electrical conductors extending between the locations. The gain of the amplifier is varied by varying the transconductance of a transconductance amplifier connected in the amplifier feedback circuit in accordance with the gain control signal.

Low current drain amplifier incorporating feedback means for establishing sensitivity

Abstract: A low current drain board bandwidth amplifier circuit for detecting low level signals of positive or negative amplitude, and for producing an output pulse whenever the input signals exceed a predetermined threshold level. A first operational transconductance amplifier is used as an amplifier, followed by a pair of operational transconductance amplifiers employed as comparators. The reference voltage for each comparator is set through a resistive circuit driven by one or more current sources. Feedback means are employed with the amplifier OTA to reduce first stage offset, and sensitivity is established with minimal adjustment requirements.

Two-dimensional analysis of triode-like operation of junction gate FET's

Abstract: Triode-like operation of junction gate FET's is analyzed by two-dimensional computer simulation. Triode-like characteristics are shown to appear with the channel normally off and the depletion layer reaching the drain electrode. Triode-like current arises from carrier injection from the source electrode into the depleted region. Triode-like operation is achieved without intrinsic material.

Transistor amplifier with protective circuit

Abstract: A transistor amplifier including a bipolar transistor supplied with an input signal and a field effect transistor which is directly connected to an output electrode of the bipolar transistor to amplify a signal applied thereto. The transistor amplifier has a protective circuit which senses the load impedance and actuates a protective means across an input terminal of the transistor amplifier when the sensed load impedance is lower than a predetermined value. Accordingly, the transistor amplifier is protected against overload conditions.

Signal amplifier circuit using a pair of complementary junction field effect transistors

Abstract: A signal amplifier circuit includes at least one pair of complementary junction field effect transistors serially connected in a source-to-source relationship between first and second power supply source terminals. In order to apply a reverse bias between the gate and source in each of the paired transistors, the gate bias potential of one of the paired transistors can be selected between a potential on the first power supply terminal and a potential of the commonly connected sources of the transistor pair, and the gate bias potential of the other transistor be selected between a potential at the second power supply terminal and the potential of the commonly connected sources of the transistor pair. According to this invention, direct coupling can be easily effected between amplifier stages using a common power supply source.

Driver circuit for liquid crystal display using insulated gate FETs

Abstract: A driver circuit comprises an output circuit having a depletion type MOSFET and an enhancement type MOSFET connected in series with the depletion type FET. A voltage V1 is supplied to the drain of the depletion type FET and a voltage V2 is supplied to the source of the enhancement type FET, wherein |V1| > |V2| > |V th D|, VthD being the threshold voltage of the depletion type MOSFET. A control signal is supplied directly to the gate of the enhancement type FET and, through an inverter, to the gate of the depletion type FET. As a result, a push-pull driver circuit using E/D MOSFETs is obtained.

Direct-coupled FET amplifier

Abstract: A direct-coupled full stage cascaded amplifier comprising an output stage, a drive stage and a predrive stage. The output stage is composed of an SEPP (single-ended push-pull) circuit of a plurality of FET's having a certain conductivity type channel. The drive stage is composed of a differential amplifier circuit of a plurality of FET's having a channel of a conductivity type same as that of the FET's in the output stage. The pre-drive stage is composed of another differential amplifier circuit of a plurality of FET's having a channel of a conductivity type opposite to that of the FET's in the output stage. The source electrodes of the FET's in the respective differential amplifier circuits are connected via constant current circuits, respectively, to voltage supply lines having opposite polarities.

Microwave-transistor power-amplifier design by large-signal y parameters

Abstract: The validity of large-signal y parameters for use in the design of microwave-transistor power amplifiers has been investigated, and simple design equations have been derived for the optimum source and load terminations. The predicted terminations are in good agreement with those experimentally obtained with a 1 GHz 1 W amplifier.

CW oscillation characteristics of GaAs Schottky-barrier gate field-effect transistors

Abstract: The CW oscillation characteristics of GaAs Schottky-barrier gate FET's have been examined at 10 GHz. The maximum output power of 41.2 mW and the maximum efficiency of 15.6 percent have been obtained for the GaAs FET with a gate length of 1.5 µm and an electrode width of 300 µm. The experimental results have shown that the GaAs FET possesses promising features for an oscillator application as well as an amplifier application.

Low current drain amplifier incorporating means for minimizing sensitivity drift

Abstract: An amplifier circuit for detecting low level signals of positive or negative amplitude, and for producing an output pulse whenever the input signals exceed a predetermined threshold level. The threshold level, or sensitivity of the amplifier circuit, is established through use of a pair of operational transconductance amplifiers employed as comparators, the reference voltage for each comparator being set through a resistive circuit driven by one or more current sources. The design provides for compensation of amplifier offsets with minimal adjustment requirements, and permits operation with very low current drain.

Differential amplifier with constant gain

Abstract: The subject of this invention is a differential amplifier circuit having a constant gain characteristic over a range of input voltage and suitable for use in integrated circuits in semi-conductor chips. The circuit is embodied in the enhanced-depleted field effect transistor technology and includes a pair of parallel circuits. Each circuit has a depletion type of field effect transistor (FET) connected to the drain voltage source, and its source connected to the drains of two enhanced FET's and to the gate of the one of these which has its source to a ground level. The other enhanced FET's have their sources connected together and to a constant current source. One gate of these other FET's is connected to the reference voltage and the other to an input voltage to be amplified. By a proper selection of FET design parameters, the amplifier gain can be constant over the full operating range of the input voltage.

Complementary FET pulse control circuit

Abstract: A pulse control circuit comprising a first FET (Field Effect Transistor), put into the conductive state in response to an input pulse signal, a first time constant circuit charged when the first FET is put in the conductive state, a second FET put into the conductive state with the charging voltage of the first time constant circuit, and a second time constant circuit discharging the charged electricity in the first time constant circuit when the second FET is put in the conductive state.

Linear high power transistor amplifier

Abstract: A linear high power transistor amplifier operable over a wide band of modulation frequencies wherein linearity of response is maintained by use of an active bias circuit.

Current mirror amplifier

Abstract: Unity current gain impedance transformation at the input of a field effect transistor current mirror amplifier reduces the input impedance and renders it independent of the mirror ratio. A net saving of semiconductor material may be obtained for a given mirror ratio and input impedance when the transformation is provided by a common gate connected complementary field effect transistor meeting certain effective threshold voltage and forward transfer conductance ratio requirements.

Broadband lumped-element X band GaAs f.e.t. amplifier

Abstract: The design of a 2-stage broadband X band amplifier using GaAs Schottky field-effect transistors is described. The performance of the intrinsic device and the amplifier are summarised. The amplifier gives 9.5±1 dB gain over the frequency range 6.5–12 GHz. The v.s.w.r. at the input and the output does not exceed 2.5:1. Practical wideband matching networks are described that minimise overall amplifier noise figure and maintain a constant gain over the design bandwidth, while including the effects of parasitics, loss and discontinuity capacitances.

High performance differential amplifier

Abstract: A differential amplifier having very high common mode rejection is shown. In its simple form four transistors and three constant current sources are connected into a balanced configuration. Balance is automatic so that special component selection is not required.