Showing papers on "FET amplifier published in 1976"

GaAs microwave power FET

Abstract: A design consideration for an X-band GaAs power FET, features of the fabrication process, and electrical characteristics of the FET are described. Interdigitated 53 source and 52 drain electrodes and an overlaid gate electrode for connecting 104 Schottky gates in parallel have been introduced to achieve a 1.5-µm-long and 5200-µm-wide gate FET. A sheet grounding technique has been developed in order to minimize the common source lead inductance (L 8 = 50 pH). The resulting devices can produce 0.7-W and 1.6-W saturation output power at 10 GHz and 8 GHz, respectively. At 6 GHz, a linear gain of 7 dB, an output power of 0.85 W at 1-dB gain compression and 30-percent power added efficiency can be achieved. The intercept point for third-order intermodulation products is 37.5 dBm at 6.2 GHz.

Amplifier for fiber optics application

Abstract: An amplifier for use with a photodiode in an electro-optical transmission ne. A transimpedance amplifier is connected to an output port of a photodiode and a T-network feedback circuit is provided as a feedback element in order to provide a significant increase in the transimpedance gain-bandwidth product.

Amplifier improvements for limiting clipping

Abstract: A differential amplifier is connected to an amplifier for comparing an amplifier input signal with the signal fed back by the amplifier feedback circuit. The output of the differential amplifier is coupled to a full wave rectifier the output of which controls an attenuator connected between a source of electrical input signals and the amplifier. When the amplifier is operating in its linear range, the differential amplifier inputs are identical and it does not produce an output. Under this condition, the input signal is not attenuated. However, in the presence of amplifier clipping, the differential amplifier produces an output which, after full wave rectification, operates to increase the attenuation, and thus reduce the amplitude of the signal applied to the amplifier; clipping is limited.

Charge injector transistor memory

Abstract: Disclosed is a dynamic memory cell storing digital information, particularly adapted for integrated semiconductor circuit fabrication. The circuit configuration has a bipolar transistor with information storage preferrably in the capacitance of the junctions, and a field effect transistor (FET) for selectively injecting charge into the capacitances. In integrated form, isolation is required only between columns of cells, a buried subcollector forming a common sense line for the entire column, while each of the base regions (also used as a first controlled region of the FET) requires no external contact at all. A further impurity region formed into each column of cells forms a second region of the FET and can be used as a bit line for the entire column. In one embodiment, separate contacts are provided for each of the emitter regions and each of the FET gate regions, while in another embodiment, only a single contact to both of the emitter region and FET gate region of each cell is required.

Microwave MESFET Mixer

Abstract: GaAs metal-semiconductor FET's (MESFET) are developed for use in amplifiers at microwave frequencies. The FET has a Schottky barrier between the gate and source, operating in the same manner as a Schottky-barrier diode. If the Schottky barrier is used as a mixer, the IF signal is generated and simultaneously amplified by the FET itself. Thus a mixer with IF preamplifier can be realized. In this paper the theoretical and experimental results of a FET mixer are described. In such operations, the conversion loss in the freqnency conversion alone is large due to the high series resistance of the Schottky barrier. However, the overall FET mixer has a "conversion gain" because the IF gain of the FET is made large. The experimental conversion gain is 6 dB at the RF frequency of 10.8 GHz and the IF frequency of 1.7 GHz. The noise figure of the FET mixer is at present large (15 dB, for example), due to large conversion loss in the frequency conversion.

Instantaneous floating point amplifier

Abstract: An improved instantaneous floating point amplifier is provided having a plurality of cascaded amplifier stages, wherein the gain of a given stage of the amplifier is the square of the gain of the immediately succeeding stage of the amplifier. The number of amplifier stages which are required to implement the amplifier is minimized, and the control logic which is required to decide if a given stage is needed to amplify the input signal to a level within preselected limits is simplified. The amplifier has an automatic nulling feature which permits nulling of the amplifier without loss of data.

Low power dissipation combined enhancement depletion switching driver circuit

Abstract: In a push-pull output circuit comprising inverters, each using a depletion-type load field-effect transistor (FET) and an enhancement-type driving FET, an intermediate inverter including a depletion-type load FET and an enhancement-type driving FET is added between the input side and output side inverters. The load impedance of the output side inverter is set at a value much smaller than those of the other inverters. The utilization of a power supply voltage is enhanced because of the use of depletion-type FET's and the total current in the circuit is low due to the use of the intermediate inverter.

Class B FET amplifier circuit

Abstract: A complementary inverter amplifier circuit comprising a complementary inverter including a p-channel MIS FET connected to a first source potential, an n-channel MIS FET connected to a second source potential, the gate of the two FETs being applied with a common linear input, respective load resistors connected to the drains of the complementary FETs, an output being derived from the interconnection point of the load resistors or from the drains of the FETs, and a bias resistor connected between the gate and the drain of each of the complementary FETs, the input being supplied to the gates of the FETs through respective capacitors. The p-channel FET and n-channel FET are individually biased so that the circuit may serve as a class B push pull amplifier of low power consumption.

Self-oscillating mixer circuit

Abstract: A self-oscillating mixer circuit to operate mainly at SHF band comprises a single-gate FET and a micro strip line. The gate or source terminal of the FET is connected to a radio frequency signal input line. A feedback path is provided between the drain terminal and the gate or source terminal. An intermediate frequency output line is connected to the drain electrode of the FET. A dielectric resonator is coupled to the radio frequency signal input line to improve the stability of an oscillator frequency and to suppress leakage of a local oscillator signal.

Circuit combining bipolar transistor and JFET's to produce a constant voltage characteristic

Abstract: A pair of FET's are coupled in series between the emitter and collector of a bipolar transistor and the juncture of the FET's coupled to the bipolar transistor base. The FET gates are coupled to the bipolar transistor collector. When a current is passed through the emitter-collector terminals in excess of a threshold value, a constant voltage will appear over a substantial current range. The constant voltage is related to FET Vp and can be used to compensate or track integrated circuits that contain both FET's and bipolar transistors.

Method and a device for eliminating the residual error voltage of an amplifier

Abstract: The connections between the two inputs of an amplifier and the two outputs of a signal source as well as between the outputs of the amplifier and the inputs of a downstream output element into which the amplifier delivers a signal are inverted periodically and simultaneously and integration is carried out between the outputs of the amplifier and the inputs of the output element. In addition, the inputs of the amplifier are short-circuited periodically, the frequencies of inversion and of short-circuiting being multiples of each other.

High accuracy MOS comparator

Abstract: The voltages to be compared are applied to a passive MOS capacitor differencing circuit for producing a voltage difference signal, which then is amplified by a high-gain non-precision FET amplifier, the output of which is passed through a low output impedance FET buffer amplifier to a FET latching circuit. Capacitive coupling is used for enabling the amplifiers to be independently biased and to eliminate D.C. offsets. The operating cycle of the comparator has two periods. During an initial set-up or preconditioning period the amplifiers are self-biased by appropriate switching actions which cause each of the amplifiers to be set at a desired operating point that is maintained when its respective bias switching connection subsequently is opened. The bias switch openings in the respective amplifier and latching stages are timed to occur in a chosen sequence which causes the switching transients to be absorbed. At the end of the preconditioning period, the comparator is set up for operation in the comparison period during which the input signals are compared.

Offset adjustment circuit

Abstract: An offset adjustment circuit for a differential amplifier includes a current source connected in series with a resistor for establishing a biasing voltage for a pair of field effect transistors (FET) having variable resistors in their biasing circuits. These FET's are connected to introduce currents respective connections between an input stage and a second stage of the differential amplifier. The difference of the currents supplied by the FET's divided by the transconductance of the input stage of the differential amplifier corresponds to an offset which remains fixed with changes in temperature. The offset introduced by the FET's, as determined by the adjusted values of the resistors in their biasing circuits, may be in opposition to the offset of the differential amplifier to either reduce it partially or completely, or it may be additive to the offset of the differential amplifier, as desired.

Temperature compensated constant current source device

Abstract: There is disclosed a constant current source device comprising a diffused integrated circuit resistor in combination with a junction field effect transistor (FET). The FET is fabricated having an ion-implanted channel and diffused regions of the same conductivity type of material as the channel material, the diffused regions constitute the Source and Drain electrodes of the FET. The use of ion-implantation enables a tight tolerance to be maintained on the pinch-off voltage (V P ) characteristics of the FET. By extending the source diffusion region the diffused resistor is produced integral with the FET and has a constant and known, but high temperature coefficient (TC). By taking advantage of the high TC of the resistor and the controlled V P of the FET, the combining structure provides a constant current having a substantially zero temperature coefficient over the temperature range from -50° C to +125° C.

Amplifier with controllable transmission factor and switchable control characteristic

Abstract: An amplifier circuit whose gain bears a desired relation to a control voltage, including a differential amplifier, a plurality of impedances interconnected between the amplifier terminals and switches interconnected with the impedances and switchable between two states which create two impedance configurations that give the circuit mutually complementary gain vs. control voltage control characteristics.

Complementary symmetry fet mixer circuits

Abstract: Series-connected, field-effect transistors (FET's) of complementary conductivity types are employed to mix two or more input signals. The transistors are quiescently biased in their linear operating range. Each input signal is applied to the gate electrode of one FET and the gate electrode of the corresponding FET of opposite conductivity type in the series string. The output signal containing sum and difference frequencies is available at a common drain connection between two adjacent transistors of opposite conductivity types at the center of the string.

Variable impedance circuit

Abstract: A variable impedance circuit comprises an amplifier with a high input impedance and a high output impedance whose gain is variable in response to a control voltage, an emitter-follower transistor, and an impedance element adapted to feedback an output signal to an input terminal of the amplifier. The input terminal of the amplifier and the input terminal of the emitter-follower transistor are connected in common. The emitter-follower transistor has its output terminal connected in series with the output terminal of the amplifier through a load resistor. An impedance of the amplifier as viewed from its input terminal is multiplied by Miller effect and varied in value by the control signal to a great extent.

Limiting amplifier with adjustable limits

Abstract: A limiting amplifier includes an operational amplifier with three feedback loops. One loop controls the gain of the amplifier when the output signal is between the upper and lower limit. Each of the other two feedback loops comprises the high gain summing amplifier in series with a diode, each summing amplifier comparing the output signal with one of the limit signals. The summing amplifiers insure hard limiting when the output signal tends to exceed the upper or lower limit.

YIG-Tuned GaAs FET Oscillators

Abstract: The design and construction of a C-X straddle band YIG-tuned oscillator with 4 GHz frequency coverage is presented. A 1mu-gate GaAs FET is used for the active element, and is tuned by a YIG sphere. A one-stage single ended GaAs FET buffer amplifier is included to enhance overall performance. Power output is a minimum of 5 mW at 10 GHz, and overall performance is equal or superior to that offered by alternative swept frequency sources.

Difference amplifier having extended common mode range

Abstract: A difference amplifier, the construction of which includes operational amplifier, has an extended amplitude range of common mode signal. The input of the circuit which is applied to the inversion input of the operating amplifier is applied to the latter through an attenuation network. An adjustment of the other resistor values in the circuit is made to appropriately retain the desirable characteristics of keeping common mode rejection.

Integrated FET circuit with input current cancellation

Abstract: An integrated circuit including an FET and an analog for cancelling input current that would otherwise be required to supply the FET gate leakage current. The analog establishes a leakage current the magnitude of which is a substantially fixed proportion of the FET leakage current over a given operating range, and employs proportional current mirror means referenced to the analog leakage current to supply the FET leakage current and thereby substantially cancel the input bias current. In a preferred embodiment the analog comprises a lateral PNP multi-collector transistor with one collector connected to its base to establish a reference current, another collector providing the cancellation current, and its base voltage tracking the FET gate voltage so that the two leakage currents remain substantially equal. An analog FET may also be employed to cancel gate-to-drain and gate-to-source leakages. A description of the invention as applied to an operational amplifier is given.

Digitally controlled amplifying equipment

Abstract: A digitally controllable amplifier unit and musical instrument amplifier incorporating such a unit. Digital control of the transfer function of a high-gain virtual-earth amplifier is effected by switching input and feedback impedances by means of transistor switches. Digital storage means are used to control the transistor switches.

Microwave Power GaAs FET Amplifiers

Abstract: The development of broad-band microwave amplifiers using state-of-the-art GaAs power FET's covering the 6-12-GHz frequency band is presented. A unique circuit topology incorporating an edge-coupled transmission line section for both impedance matching and input/output dc blocking is described. The microstrip circuit design of an X-band 1-W 22-dB-gain GaAs FET amplifier is also discussed. Microwave performance characteristics such as intermodulation, AM-to-PM conversion, and noise figure are included.

Gravitational Radiation Detectors at 145 Hz

Abstract: A pair of gravitational radiation detectors at ν0=145 Hz have been designed and constructed. The 1400-kg aluminum square antennas, 1.65×1.65×0.19 m3 with cuts on each side, have a directivity gain of 4 db. Each antenna is equipped with an electrostatic transducer with coupling constant β~1.8×10-3, followed by a low noise FET amplifier. Well isolated from all conceivable terrestrial disturbances, the antennas show the Brownian motion, 18 db over noise within a bandwidth of 1 Hz. After AD conversion with a sampling period of Δt=1 sec, the effective noise of the detectors in term of the antenna temperature is Teff\cong10K. Correlation of signals from two detectors over observation time NTΔt will reveal NG short gravitation radiation pulses having energy spectrum density F(ν0)[J m-2 Hz-1], if NG \gtrsim5.9×1011NT1/2.

Land mine detector with pulse slope, width and amplitude determination channels

Abstract: Circuitry for detecting buried non-metallic and metallic land mines is diosed. A peak detector receives signals from a conventional search head. The output of the peak detector is amplified and this amplified signal is applied to a slope determination channel, to a pulse width determination channel and to a pulse amplitude determination channel. The output pulses from the slope determination channel, the pulse width determination channel and the pulse amplitude determination channel are all applied to different inputs of an AND gate. If pulses are coincidently present on all the inputs of the AND gate, the AND gate provides an output pulse which is applied to a field effect transistor (FET) switch. The FET switch controls the gain of an amplifier such that the gain of the amplifier is measurably increased when the AND gate applies a pulse to the FET switch. When the gain of the amplifier is increased by the FET switch, a signal burst indicating that a mine has been detected is produced on the output of the amplifier. The output from the amplifier is typically coupled to a headset worn by the person conducting the search.

Split-path receiver for fiber optics application

Abstract: A receiver for use with a photodiode in an electro-optical transmission l. First and second amplifier circuit channels are connected to an output port of a photodiode. One channel is provided with a wide-bandwidth amplifier for amplifying the high frequency portion of a signal from said output signal port and a second channel is provided with a low frequency amplifier for amplifying direct current and the low frequency portions of the signal from said output signal port. The outputs of the wide-bandwidth amplifier and the low frequency amplifier are combined to provide a composite output signal which is an amplified replica of the output of said photodiode.

Bidirectional radio frequency amplifier with receiver protection

Abstract: A bidirectional radio frequency amplifier which includes a power amplifier and a receiver amplifier connected to a common antenna. A pair of parallel diodes coupled across the input of the receiver amplifier provides a high impedance path for a received signal and a low impedance path during transmission thereby eliminating the need for mechanical or semiconductor switching.

Overvoltage protection circuit for general purpose amplifier

Abstract: An output stage and feedback circuit for a buffer amplifier are disclosed. The output stage protects an operational-amplifier circuit preceding it from overvoltages appearing at the load. The circuit includes a pair of complementary transistors in a push-pull arrangement that sources and sinks current to and from the load. Both the transistors are in common-emitter configurations, and each one has a corresponding diode connected between its collector and the load in an orientation opposite that of the collector-base junction. The diodes prevent the reverse current that would otherwise flow in response to an output overvoltage of the polarity that forward biases the collector-base junction of the transistor, and the over-voltage is thereby prevented from being seen at the operational-amplifier output terminal. Overvoltages of the other polarity are not seen because they reverse bias the base-collector junction. Each amplifier transistor also has associated with it an auxiliary transistor whose base is connected through a zener diode to the output terminal of the circuit. The auxiliary transistor is connected between the output-stage amplifier and a source voltage. An output overvoltage of the right polarity and sufficiently large to turn on the zener diode therefore turns on the auxiliary transistor. This turns off the amplifier transistor that would otherwise be on, thereby preventing thermal destruction of the amplifier transistor.

Microwave frequency discriminator comprising an FET amplifier

Abstract: A microwave frequency discriminator comprising a field effect transistor (FET) amplifier, input and output impedance matching networks and a detector. The FET is biased to generate an output RF signal within a predetermined frequency bandwidth in response to an input RF signal of substantially constant power level. The input and output impedance matching networks are arranged to provide the impedance conditions to shape and linearize the power-frequency response of the FET amplifier throughout the predetermined frequency bandwidth such that the frequency response approximates the linear power-frequency characteristic of a frequency discriminator.

Drive control to prevent simultaneous conduction in push-pull switching amplifier

Abstract: A drive circuit responsive to the phase of the amplifier output current eres that the non-conducting amplifier element remains off while the other amplifier element conducts. The output current phase can be detected either from the individual amplifier element outputs or from their combined outputs. Adjustments are made to compensate for any phase shift which occurs between the input to the amplifier and the point in the output at which the phase is detected.