Showing papers on "FET amplifier published in 2008"

Power amplifier circuit for multi-frequencies and multi-modes and method for operating the same

Abstract: A multi-frequency and multi-mode power amplifier is provided. The amplifier has a carrier power amplifier and a peaking power amplifier. The carrier power amplifier receives a first signal and outputs a first amplified signal, in which a first transistor size adjusting unit is included to adjust an equivalent transistor size based on a mode indication signal. The peaking power amplifier receives a second signal and outputs a second amplified signal, in which a second transistor size adjusting unit is included to adjust an equivalent transistor size based on the mode indication signal.

Cascode circuit employing a depletion-mode, gan-based fet

Abstract: A circuit includes an input drain, source and gate nodes. The circuit also includes a group III nitride depletion mode FET having a source, drain and gate, wherein the gate of the depletion mode FET is coupled to a potential that maintains the depletion mode FET in its on-state. In addition, the circuit further includes an enhancement mode FET having a source, drain and gate. The source of the depletion mode FET is serially coupled to the drain of the enhancement mode FET. The drain of the depletion mode FET serves as the input drain node, the source of the enhancement mode FET serves as the input source node and the gate of the enhancement mode FET serves as the input gate node.

A Current-Feedback Instrumentation Amplifier With 5 $\mu{\hbox{V}}$ Offset for Bidirectional High-Side Current-Sensing

Abstract: This paper describes an instrumentation amplifier for bidirectional high-side current-sensing applications. It uses a multipath indirect current-feedback topology. To achieve low offset, the amplifier employs a combination of chopping and auto-zeroing in a low frequency path to cancel the offset of a wide-band amplifier in a high frequency path. With a 60 kHz chopper clock and a 30 kHz auto-zero clock, this offset-stabilization scheme results in an offset voltage of less than 5 muV , a CMRR of 143 dB and a common-mode input voltage range from 1.9 to 30 V. The input voltage-to-current (V-I) converters required by the current-feedback topology are implemented with composite transistors, whose transconductance is determined by laser-trimmed resistors. This results in a less than 0.1% gain inaccuracy. The instrumentation amplifier was realized in a 0.8 mum BiCMOS process with high voltage transistors, and has an effective chip area of 2.5 mm2 .

X-Band Substrate Integrated Waveguide Amplifier

Abstract: Design and realization of a compact X-band single-transistor amplifier with substrate integrated waveguide (SIW)-based input and output matching networks is presented. The overall size of the proposed SIW amplifier is only 1.5lambdag at the center frequency. Using a calibration technique, we extract the S-parameters of the fabricated amplifier with reference to its SIW ports. Measurements show that the amplifier features 10 dB of power gain with less than 2 dB of ripple and more than 10 dB of input and output return losses on the SIW ports in the entire frequency band. Due to an appropriate modeling of the constituent blocks of the amplifier, a good agreement between the simulation and measurement results is observed.

Switched capacitor amplifier with higher gain and improved closed-loop gain accuracy

Abstract: A switched capacitor CMOS amplifier uses a first stage non-inverting CMOS amplifier driving a second stage inverting CMOS amplifier. The first stage amplifier is provided with positive feedback to substantially increase the gain of the first stage amplifier. In the described examples, the positive feedback is provided either by connecting a capacitor from the output to the input of the first stage amplifier or by connecting a shunt transistor in parallel with an input transistor and driving the transistor from the output of the first stage amplifier. The substantially increased gain resulting from the positive feedback allows the gain of the switched capacitor amplifier to be set by the ratio of the capacitance of an input capacitor to the capacitance of a feedback capacitor. The amplifier also includes switching transistors for periodically discharging the input capacitor and the feedback capacitor.

Apparatus for power amplification based on envelope elimination and restoration (EER) and push-pull switching

Abstract: A power amplifying apparatus based on envelope elimination and restoration (EER) includes a voltage amplifier to amplify a high frequency component of an envelope signal, a switching amplifier to generate a low frequency component signal of a drain bias based on a first pulse width modulation (PWM) signal that corresponds to a low frequency component of the envelope signal, and a push-pull switch, connected to the switching amplifier in parallel, to add a high frequency component signal to an output of the switching amplifier by pushing or pulling current to or from the output of the switching amplifier.

Ultra-Low-Noise High-Input Impedance Amplifier for Low-Frequency Measurement Applications

Abstract: The design of a low-frequency high-input-impedance amplifier having probably the lowest noise ever reported is presented. The amplifier's frequency range is from about 0.07 Hz to about 110 kHz at the -3-dB level. The equivalent input noise voltage spectral density is about 5.6, 1.4, 0.6, and 0.5 nV/radicHz at frequencies 0.1, 1, 10, and 1000 Hz, respectively. Gain of the amplifier is about 83 dB. Noise analysis is made for active-type, capacitive-type, and low impedance signal sources. The contribution from different noise sources in the amplifier and JFET to the overall noise is shown.

Reconfigurable tunable RF power amplifier

Abstract: A multi-band, multi-standard programmable power amplifier having tunable impedance matching input and output networks and programmable device characteristics. The impedance of either or both of the impedance matching input and output networks is tunable responsive to one or more control signals. In one example, the programmable power amplifier incorporates a feedback control loop and the control signal(s) are varied responsive to the feedback loop.

Chopper-stabilized amplifier and magnetic field sensor

Abstract: A chopper-stabilized amplifier has switching networks arranged to support a high frequency clocking signal and to provide a high common mode rejection and a high rejection of an offset component of an input signal. A magnetic field sensor includes a Hall effect element coupled to a modulation circuit. The modulation circuit provides a signal to the chopper-stabilized amplifier. The chopper-stabilized amplifier provides an output signal to a low pass filter, which provides an output signal from the magnetic field sensor.

Performance of a Diode-Clamped Linear Amplifier

Abstract: This paper proposes a new high-efficiency diode-clamped linear amplifier, and presents its theoretical and experimental performance. The main circuit of the proposed amplifier consists of series-connected MOSFETs, series-connected dc power supplies and clamping diodes. The circuit configuration is similar to a diode-clamped multi-level inverter, except for using complementary power semiconductor devices, n-channel and p-channel MOSFETs. A pair of complementary MOSFETs in each leg is operated in an active state, just like a conventional linear amplifier, whereas the other MOSFETs are operated in either on- or off-state like a diode-clamped multilevel inverter. As a results, a prototype 12-series diode-clamped amplifier shows an experimental efficiency as high as 90%, while a conventional linear amplifier has a theoretical efficiency of 78.5%. Experimental results demonstrate that the proposed amplifier has the capability of driving a three-phase induction motor rated at 2.2 kW.

3-way doherty amplifier with minimum output network

Abstract: A 3-way Doherty amplifier has an amplifier input and an amplifier output. The amplifier has a main stage, a first peak stage and a second peak stage. The amplifier has an input network connecting the amplifier input to the inputs of the stages, and an output network connecting the stages to the amplifier output. The output network implements a phase shift of 90° between the output of the main stage and the amplifier output; a phase shift of 180° between the output of the first peak stage and the amplifier output; and a phase shift of 90° between the third output and the amplifier output.

Electronic devices : conventional current version

Abstract: Table of Contents 1. Semiconductors Basics 2. Diode Applications 3. Special-Purpose Diodes 4. Bipolar Junction Transistors (BJT's) 5. Transistor Bias Circuits 6. BJT Amplifiers 7. Power Amplifiers 8. Field-Effect Transistors (FETs) 9. FET Amplifiers 10. Amplifier Frequency Response 11. Thyristors 12. The Operational Amplifier 13. Basic Op-Amp Circuits 14. Special-Purpose Op-Amp Circuits 15. Active Filters 16. Oscillators 17. Voltage Regulators 18. Communications Circuits

Source-gated thin-film transistors

Abstract: The on-current of a source-gated transistor is determined by the current passing through a reverse biased source barrier. Since this current is field-dependent, it can be controlled using a gate located directly opposite the source barrier. This concept leads to major changes in thin-film transistor behaviour compared with the standard FET. In particular saturation voltages, short channel effects and excess carrier concentrations are reduced while internal electric fields are enhanced. These features lead to lower power dissipation and higher output impedance compared with a FET as well as improvements in stability and speed. The SGT is particularly useful for high-performance circuits in poor-quality semiconductors.

N-way doherty distributed power amplifier

Abstract: A power amplifier using N-way Doherty structure for extending the efficiency region over the high peak-to-average power ratio of the multiplexing modulated signals such as wideband code division multiple access and orthogonal frequency division multiplexing is disclosed. In an embodiment, the present invention uses a dual-feed distributed structure to an N-way Doherty amplifier to improve the isolation between at least one main amplifier and at least one peaking amplifier and, and also to improve both gain and efficiency performance at high output back-off power. Hybrid couplers can be used at either or both of the input and output. In at least some implementations, circuit space is also conserved due to the integration of amplification, power splitting and combining.

A novel Doherty amplifier for enhanced load modulation and higher bandwidth

Abstract: We are reporting a new topology for the Doherty amplifier to increase its bandwidth and enhance the load modulation. A varactor-based impedance transformer has been employed to replace the bulky and narrowband quarter-wave impedance inverter. Load modulation is carried out adaptively using the proposed varactor-based structure based on the input power level. An envelope detector is employed for adaptive impedance transformation of the carrier amplifier as well as bias adaptation of the peak amplifier. Based on the proposed topology, a 2W Doherty amplifier has been fabricated using discrete pHEMT transistors and low loss varactors. In order to evaluate the broad-band/multi-band performance of the proposed topology, measurements have been carried out at three sample frequencies (1.8GHZ, 2GHz and 2.2GHz) over a 400 MHz bandwidth. Power added efficiency of better than 45.3% has been achieved at maximum power level and 6-dB power back-off and maintained over the entire bandwidth. Measured IM3 is better than −42.2dBc at P1dB of 33dBm for all design frequencies.

Microstrip superconducting quantum interference device radio-frequency amplifier: Scattering parameters and input coupling

Abstract: The forward scattering parameters of an amplifier based on a dc superconducting quantum interference device are directly measured at 4.2K as functions of the applied magnetic flux. These parameters are equivalent to the real and imaginary components of the input impedance and forward gain of the amplifier. The results can be described using an equivalent circuit model of the fundamental resonance of the microstrip resonator which forms the input of the amplifier. The circuit model is used to determine the series capacitance required for critical coupling of the microstrip to the input circuit.

High-Gain Amplifiers With Amorphous-Silicon Thin-Film Transistors

Abstract: This letter demonstrates amplifier design with amorphous-hydrogenated-silicon thin-film transistors (TFTs) for high dc gain. High dc gain is achieved by using positive feedback to improve load impedance. The transfer characteristics of the amplifier are resistant to threshold voltage shift in the TFTs.

Voltage/current control apparatus and method

Abstract: A voltage/current control apparatus and method are disclosed. The apparatus includes a low-side field effect transistor (FET) having a source, a gate and a drain, a high-side field effect transistor (FET) having a source, a gate and a drain, a gate driver integrated circuit (IC), a sample and hold circuit, and a comparator configured to produce a trigger signal at the output when a sum of the first and second input signals is equal to a sum of the third and fourth input signals, wherein the trigger signal is configured to trigger a beginning of a new cycle by turning the gate of the high-side FET “on” and the gate of the low-side FET “off”.

Progressive power generating amplifiers

Abstract: A power amplifier circuit includes an unequal power splitter that splits an input signal using an unequal power split and provides a first power level signal and a second power level signal. A first amplifier path includes a first transistor amplifier that amplifies the first power level signal, and a second amplifier path includes a second transistor amplifier that amplifies the second power level signal. The second transistor amplifier is configured to turn on at a different power level of the input signal than the first transistor amplifier. An unequal combiner combines the amplified first power level signal and the amplified second power level signal.

Doherty amplifying apparatus using a harmonic control circuit

Abstract: A Doherty power amplifying apparatus includes a harmonic-controlled Doherty amplifier (606,607); and an input matching unit (602,604) and an output matching unit (612,614) for input matching and output matching the harmonic-controlled Doherty amplifier (606,607), respectively. The harmonic-controlled Doherty amplifier includes a carrier amplifier (606); a peaking amplifier (607) arranged in parallel to the carrier amplifier (606); and a harmonic control circuit (608,610), arranged in front of the output matching unit (612,614), for controlling a harmonic component of an output of the Doherty amplifier (606,607) to enable the Doherty amplifier to perform a switching or saturation operation.

Hybrid-Mode SRAM Sense Amplifiers: New Approach on Transistor Sizing

Abstract: A novel high-speed sense amplifier for ultra-low-voltage SRAM applications is presented. It introduces a completely different way of sizing the aspect ratio of the transistors on the data-path, hence realizing a current-voltage hybrid mode Sense Amplifier. Extensive post-layout simulations have proved that the new Sense Amplifier provides both high-speed and low-power properties, with its delay and power reduced to 25.8% and 37.6% of those of the best prior art. It also offers a much better read-effectiveness and robustness against the bit- and data-line capacitances as well as VDD variations. Furthermore, the new Sense Amplifier is able to tolerate a large difference between the parasitic capacitances associated with the complementary DLs. It can operate down to a supply voltage of 0.9 V, the lowest reported for a 0.18 mum CMOS process. A modified cross-coupled amplifier is also introduced, allowing the Sense Amplifier to operate down to 0.55 V.

Bootstrapped two-electrode biosignal amplifier

Abstract: Portable biomedical instrumentation has become an important part of diagnostic and treatment instrumentation. Low-voltage and low-power tendencies prevail. A two-electrode biopotential amplifier, designed for low-supply voltage (2.7–5.5 V), is presented. This biomedical amplifier design has high differential and sufficiently low common mode input impedances achieved by means of positive feedback, implemented with an original interface stage. The presented circuit makes use of passive components of popular values and tolerances. The amplifier is intended for use in various two-electrode applications, such as Holter monitors, external defibrillators, ECG monitors and other heart beat sensing biomedical devices.

Fully-differential self-biased bio-potential amplifier

Abstract: A highly versatile and programmable bio-potential recording amplifier is presented. The amplifier achieves low-power operation with minimal size by using a fully-differential self-biased operational amplifier and the Miller capacitance technique. The experimental results of recording various biological signals are provided.

Switching circuit having low threshold voltage

Abstract: A switching circuit for preventing malfunction of a switching device formed of a wide band-gap semiconductor used for switching a high-power main power supply includes a normally-off type FET having a gate electrode, a source electrode connected to the ground, and a drain electrode connected to a power supply potential Vdd, and a normally-on type FET having drain and source electrodes connected to the gate and source electrodes of the FET, respectively, and a gate electrode. In the absence of any power supply, the normally-on type FET turns on. As a result, the gate/source potential of FET attains to 0V, and FET is kept off.

Amplifier with dynamic bias

Abstract: Techniques are provided for dynamically biasing an amplifier to extend the amplifier's operating range while conserving power. In an embodiment, a detector (310) is provided to measure the amplifier output to determine an operating region of the amplifier. The output of the detector (310) may be input to a bias adjuster (320), which outputs a dynamic voltage level supplied to at least one bias transistor (M81) in the amplifier. Multiple embodiments of the detector and bias adjuster are disclosed.

Harmonic tuned doherty amplifier

Abstract: Disclosed is a Doherty amplifier which includes a carrier amplifier for always performing a signal amplification operation regardless of a level of an input signal, a peaking amplifier for performing an amplification operation, starting from a high power output where a level of an input signal is equal to or greater than a predetermined level, an output combination circuit for combining and outputting outputs of the carrier amplifier and the peaking amplifier, and an input division circuit for dividing an input signal into the carrier amplifier and the peaking amplifier, the Doherty amplifier including a carrier amplifier output harmonic impedance tuning network which is installed at a rear end of the carrier amplifier so as to tune an output harmonic impedance of the carrier amplifier, and a peaking amplifier output harmonic impedance tuning network which is installed at a rear end of the peaking amplifier so as to tune an output harmonic impedance of the peaking amplifier.

Hybrid class amplifier

Abstract: A power amplifier (10) configured to generate impedances at harmonic frequencies such that the power amplifier (10) operates in a class C mode in a low output amplitude range and in a class F or inverse F mode in a high output amplitude range.

Pulsed Load Modulation (PLM) Technique for Efficient Power Amplification

Abstract: A new concept of pulsed load modulation (PLM) is introduced for efficient power amplification. The proposed technique allows the power amplifier (PA) to maintain maximum efficiency until the output power of the amplifier is backed off by 6 dB. The PLM amplifier contains two pulse-biased PAs connected with a lambda/4 transmission line and a high- Q bandpass resonator. For maximum efficiency and linearity, the load impedance of the amplifier is digitally modulated using the switched-resonator concept. A prototype amplifier is implemented using two PAs and a diplexer for the 1.87-GHz band. The measured efficiency of the amplifier at peak output power is 51%. Compared with 25.5% of the conventional class-B amplifier, the PLM amplifier obtains an improved efficiency of 38% at 6-dB output power back-off.

Three-dimensional integration of silicon-on-insulator RF amplifier

Abstract: An RF amplifier implemented by wafer-scale three-dimensional integration of three completely fabricated silicon-on-insulator wafers is demonstrated. The MOSFETs are on the top and bottom tier with middle-tier matching circuits. Measured amplifier performance agrees well with simulation and the footprint is approximately 40% smaller than the conventional 2D layout.

A balanced sub-millimeter wave power amplifier

Abstract: In this paper, a new balanced sub-millimeter wave power amplifiers is presented. The amplifier uses CPW-grounded MIM capacitors to form low-loss, lumped element matching networks and uses a branchline coupler to achieve requisite quadrature phase shifts. The balanced amplifier achieves 12-dB small signal gain and 6.1-mW output power (not saturated) at a center frequency of 270-GHz. The high gain allows the amplifier to reach a moderate Power Added Efficiency (PAE) of 5.25% at the highest drive power. The results in this paper are the highest reported output powers achieved from a solid state amplifier at these frequencies, and were achieved with a high f MAX InP HEMT process.