Showing papers on "FET amplifier published in 2010"

Investigation of a Class-J Power Amplifier With a Nonlinear $C_{\rm out}$ for Optimized Operation

Abstract: This paper presents the operation principle of Class-J power amplifiers (PAs) with linear and nonlinear output capacitors (Couts). The efficiency of a Class-J amplifier is enhanced by the nonlinear capacitance because of the harmonic generation from the nonlinear Cout, especially the second-harmonic voltage component. This harmonic voltage allows the reduction of the phase difference between the fundamental voltage and current components from 45° to less than 45° while maintaining a half-sinusoidal shape. Therefore, a Class-J amplifier with the nonlinear Cout can deliver larger output power and higher efficiency than with a linear Cout. As a further optimized structure of the Class-J amplifier, the saturated PA, a recently-reported amplifier in our group, is presented. The phase difference of the proposed PA is zero. Like the Class-J amplifier, the PA uses a nonlinear Cout to shape the voltage waveform with a purely resistive fundamental load impedance at the current source, which enhances the output power and efficiency. The PA is favorably compared to the Class-J amplifier in terms of the waveform, load impedance, output power, and efficiency. These operations are described using both the ideal and real models of the transistor in Agilent Advanced Design System. A highly efficient amplifier based on the saturated PA is designed by using a Cree GaN HEMT CGH40010 device at 2.14 GHz. It provides a power-added efficiency of 77.3% at a saturated power of 40.6 dBm (11.5 W).

Demonstration of a 0.48 THz Amplifier Module Using InP HEMT Transistors

Abstract: In this letter, we present an amplifier module operating at a frequency of 0.48 THz. This represents almost a 50% increase in solid-state amplifier operating frequency compared to prior state of the art, and is the highest reported amplifier to date. The amplifier demonstrates a peak gain of 11.7 dB measured in a waveguide split-block housing. Sub 50-nm InP HEMT transistors with an estimated f MAX > 1 THz are used to achieve this level of performance. The five stage amplifier is realized in coplanar waveguide, and uses monolithically integrated dipole probes to couple the chip from the WR 2.2 waveguide.

0.8 V bulk-driven operational amplifier

Abstract: A low-voltage bulk-driven CMOS operational amplifier is proposed in this paper. The inherent small transconductance of the bulk-driven devices is enlarged using a positive feedback, improving also the noise performance. The amplifier is designed using standard 0.18 μm n-well CMOS process. Although the amplifier is optimized for 0.8 V supply voltage, it is also capable to operate under supply voltage of 0.7 V. The amplifier consumes 130 μΑ, performing 56 dB open-loop gain, 154 nV/√Hz input-referred spot noise at 100 kHz, 80 dB CMRR at 100 kHz and IIP3 equal to −4.7 dBV.

Multi-chip doherty amplifier with integrated power detection

Abstract: In accordance with an exemplary embodiment of the present invention, a Doherty amplifier is provided for applications in radio frequency, microwave, and other electronic systems. An exemplary Doherty amplifier comprises a first MMIC having a first power detector, and a second MMIC having a second power detector. The first MMIC and the second MMIC are structurally identical. Furthermore, the first MMIC is configured as a carrier amplifier and the second MMIC is configured as a peaking amplifier. In the exemplary embodiment, an amplifier control bias of the carrier amplifier is a function of the power detected by the first power detector and an amplifier control bias of the peaking amplifier is a function of the power detected by the second power detector. The ability to assemble a Doherty amplifier using a single MMIC product results in a simple and less expensive manufacturing process.

Radio frequency (rf) power amplifier and rf power amplifier apparatus

Abstract: An RF power amplifier has a final-stage amplifier stage which generates an RF transmit output signal, a signal detector which detects an RF transmit output level, a first detector, a second detector and a control circuit. The final-stage amplifier stage includes a transistor and a load element and performs saturation type nonlinear amplification and non-saturation type linear amplification. The first detector and the control circuit maintain the RF transmit output signal approximately constant with respect to a variation in load at an antenna at the saturation type nonlinear amplification. The second detector and the control circuit reduce an increase in the output voltage of the final stage transistor with respect to an overload state of the antenna at the non-saturation type linear amplification.

Stacked linear power amplifier with capacitor feedback and resistor isolation

Abstract: A power amplifier with stacked, serially connected, field effect transistors is described. DC control voltage inputs are fed to the gates of each transistor. Capacitors are coupled to the transistors. The inputs and the capacitors are controlled to minimize generation of non-linearities of each field effect transistor and/or to maximize cancellation of distortions between the field effect transistors of the power amplifier in order to improve linearity of the power amplifier output.

A wideband GaN Doherty amplifier with 35 % fractional bandwidth

Abstract: A wideband Doherty amplifier designed and implemented in GaN HEMT technology using simple circuitry is reported. The usefulness of the conventional quarter-wave impedance transformer at the output of the main amplifier for achieving wideband Doherty performance up to 35 % fractional bandwidth is experimentally verified. This simplifies the bandwidth limitation problem of the Doherty amplifier into the wideband design of the main amplifier, peaking amplifier and the input power divider. Based on this, a wideband Doherty amplifier was designed to cover a bandwidth of 640 MHz, ranging from 1.5 GHz to 2.14 GHz. For instance, the designed Doherty amplifier achieved a 1 dB compression output power of P 1dB = 43.8 dBm (24.1 W), with a maximum power-added efficiency of PAE = 69 % (drain efficiency of η = 76 %) at 1.9 GHz. At 6 dB output back-off from P 1dB , a PAE of 45 % (η = 47 %) was measured. The designed Doherty amplifier also showed acceptable linearity when characterized with two-tone and single-carrier wideband code-division multiple access (W-CDMA) stimuli. To the best of authors' knowledge, this work introduces the most wideband Doherty amplifier published so far.

High efficiency power amplifier with multiple power modes

Abstract: In a representative embodiment, a multiple mode power amplifier that is operable in a first power mode and a second power mode. The multiple mode power amplifier comprises a first amplifying unit; a second amplifying unit; a first impedance matching network connected to an output port of the first amplifying unit; a second impedance matching network connected to an output port of the second amplifying unit and to the first impedance matching network; and a third impedance matching network connected to the output ports of the first and the second amplifying units. The third impedance matching network reduces a phase difference between signals amplified by the first and the second amplifying units in the first mode.

Semiconductor radio frequency switch with body contact

Abstract: The present disclosure relates to a radio frequency (RF) switch that includes multiple body-contacted field effect transistor (FET) elements coupled in series. The FET elements may be formed using a thin-film semiconductor device layer, which is part of a thin-film semiconductor die. Conduction paths between the FET elements through the thin-film semiconductor device layer and through a substrate of the thin-film semiconductor die may be substantially eliminated by using insulating materials. Elimination of the conduction paths allows an RF signal across the RF switch to be divided across the series coupled FET elements, such that each FET element is subjected to only a portion of the RF signal. Further, each FET element is body-contacted and may receive reverse body biasing when the RF switch is in an OFF state, thereby reducing an OFF state drain-to-source capacitance of each FET element.

Millimeter-Wave Power Amplifier Based on Coaxial-Waveguide Power-Combining Circuits

Abstract: A millimeter-wave power amplifier based on a coaxial-waveguide power-combining circuit is presented in this paper. A coaxial stepped impedance transformer is used to provide an impedance transition from the 50-? input coaxial line to the oversized coaxial waveguide, and its equivalent-circuit model has also been developed. A Ka-band four-device coaxial-waveguide power amplifier is fabricated and tested. The 10-dB return loss bandwidth of the fabricated amplifier is from 27.5 to 40 GHz, and the power amplifier has 17-25.9 dB gain over a wide bandwidth from 26 to 38 GHz. The measured output power at 1-dB gain compression is about 26.6 dBm at 30 GHz, with a power-combining efficiency of about 90%.

Multi-band high-efficiency doherty amplifier

Abstract: The present invention relates to a Multi-Band Doherty amplifier. Embodiments of the present invention provide an amplifying structure including a main amplifier configured to amplify a first signal, a peak amplifier configured to amplify a second signal, a tunable impedance inverter configured to perform impedance inversion to modulate a load impedance of the main amplifier, and a combining node configured to receive the amplified second signal from the peak amplifier and an output of the tunable impedance inverter. The tunable impedance inverter includes a tuner configured to tune the impedance inversion over at least one broad frequency band. The tuner is (i) at least one capacitor, (i) at least one varactor, or (ii) at least one open stub shunted by a diode.

Efficiency-Improved High-Voltage Analog Power Amplifier for Driving Piezoelectric Actuators

Abstract: A novel high-voltage analog power amplifier derived from a well-known complementary class B amplifier is presented in this paper. The amplifier offers improved efficiency when driving capacitive loads such as piezoelectric multilayer actuators, while maintaining a high level of signal quality, peak power and low electromagnetic radiation. The main drawback of a class B amplifier in comparison to other power amplifiers is low efficiency, resulting in extensive power-loss in the two complementary transistors of the amplifier stage. Power-loss can be reduced by minimizing the voltage drop across the collector-emitter path of the transistors when a high collector current occurs. The proposed circuit uses an additional capacitor to recover up to one half of the charge stored in the actuator whenever the actuator is being discharged. The capacitor offers an additional power supply rail next to the positive and negative supply voltage of the amplifier stage. Switching the power supply net of the power transistors between the different supply rails, in order to reduce the voltage drop across the transistors, minimizes power-loss. The development of the amplifier was triggered by the introduction of a new piezoelectric motor and the requirements concerning signal quality and electromagnetic radiation. Therefore, in this paper, the circuit is analyzed using application-specific sinusoidal control signals which are used to drive the motor. Following the analytical investigation of the circuit, the amplifier is tested in an experiment measuring power consumption with a pure reactive load, and the level of distortion caused by the amplifier. In the experiment, a power-loss reduction of 47% was achieved in comparison with a class B stage. The amplifier processed a peak power of 160 W. The proposed amplifier showed total harmonic distortion of THD = 0.60% maximum. Distortions of a pure class B amplifier in the same setup were measured at THD = 0.25% .

A 60GHz transformer coupled amplifier in 65nm digital CMOS

Abstract: A three stage transformer coupled amplifier for operation in the 57–64GHz band is presented. The amplifier uses differential capacitive neutralization and low loss transformers to achieve a gain of 30dB at 61GHz. The amplifier has an output compression point of 7.5dBm and a power added efficiency at 1dB compression of 9% at 57GHz. The amplifier has been fabricated in digital CMOS and occupies an area of 0.055mm2.

Self-healing power amplifier: methods and apparatus

Abstract: An integrated power amplifier includes a divider and a combiner. The integrated power amplifier also includes two or more amplifiers. Each of the amplifier input terminals is electrically coupled to a divider output terminal and each of the amplifier output terminals is electrically coupled to a combiner input terminal. At least one power sensor is configured to provide a power amplifier performance metric. The divider and the combiner include a plurality of actuators. Each actuator has at least one actuator control terminal which is configured to provide an actuator setting. The actuators are configured via the actuator control terminals to optimize the power amplifier performance metric. Methods to simulate the operation of a self-healing power amplifier and a process for the operation of a self-healing circuit are also described.

Common-gate common-source amplifier

Abstract: Techniques for integrating a common-source and common-gate amplifier topology in a single amplifier design In one aspect, an input voltage is provided to both a common- source amplifier and a common-gate amplifier The output voltages of the common- source amplifier and the common-gate amplifier are provided to a difference block for generating a single-ended voltage proportional to the difference between the output voltages When applied to the design of, eg, low-noise amplifiers (LNA's), the disclosed techniques may offer improved noise performance over the prior art

Power amplifier with back-off efficiency

Abstract: A power amplifier system is provided with a signal path including driver stages and output stages. A power control element has one or more control ports and uses one or more nonlinear control characteristics.

Integration of sense FET into discrete power MOSFET

Abstract: A semiconductor device includes a main field effect transistor (FET) and one or more sense FETs. A transistor portion of the sense FET is surrounded by transistors of the main FET. An electrical isolation structure that surrounds the main FET is configured to electrically isolate source and body regions of the main FET from source and body regions of the sense FET. A sense FET source pad is located at an edge of the main FET and spaced apart from the transistor portion of the sense FET. The sense FET source pad is connected to the transistor portion of the sense FET by a sense FET probe metal. The isolation structure is configured such that the transistor portion of the sense FET and the sense FET source pad are located outside an active area of the main FET.

Microwave FET amplifier stability analysis using Geometrically-Derived Stability Factors

Abstract: In this paper, the concept of stability in the design of microwave amplifier is re-visited. With the help of EDA tools, the determination of the microwave amplifier stability is simplified through the derivation of Geometrically-Derive Source (μ source ) and Load (μ load ) Stability Factors along with the Rollet Stability Factor (K-Factor). The effects of stabilization elements and layout parasitics i.e. ground inductance towards the amplifier's stability and were discussed. The techniques are then demonstrated with the ATF-50189 E-pHEMT microwave amplifier typical parameters.

Amplifier for Cable and Terrestrial Applications with Independent Stage Frequency Tilt

Abstract: A system comprises a first amplifier stage including a first amplifier, a second amplifier stage including second and third amplifiers, and a fourth amplifier. The first amplifier stage includes an input and an output. The second amplifier stage is coupled between the output of the first amplifier stage and a first output node. The fourth amplifier is coupled between the input of the first amplifier stage and a second output node.

Power amplifier for mobile telecommunications

Abstract: A four-stage Doherty power amplifier includes a carrier amplifier (6), and first, second and third peaking amplifiers (14, 20, 24), the outputs of the amplifiers being coupled through an impedance network to an output node (10), wherein the carrier amplifier (6) is coupled to the output node through a first impedance inverting quarter wave transmission line stub (8), the first peaking amplifier (14) is coupled to the output node through second and third impedance inverting quarter wave transmission line stubs (16, 18) in order to provide a resultant non-inverting impedance between the first peaking amplifier and the output node (10), the second peaking amplifier (20) is coupled to a node between the second and third stubs (16, 18), and the third peaking amplifier (26) is directly coupled to the output node. The output node is connected to an output load (RL) via an impedance transforming quarter wave transmission line stub (12).

Integrated circuit with replacement metal gates and dual dielectrics

Abstract: A replacement gate structure and method of fabrication are disclosed. The method provides for fabrication of both high performance FET and low leakage FET devices within the same integrated circuit. Low leakage FET devices are fabricated with a hybrid gate dielectric comprised of a low-K dielectric layer and a high-K dielectric layer. High performance FET devices are fabricated with a low-K gate dielectric.

Integration of MOSFETs in a source-down configuration

Abstract: An output stage for a switched mode power supply has a high-side switch having a first power FET and a first speed-up FET monolithically integrated onto a first die. A low-side switch has a second power FET and a second speed-up FET monolithically integrated onto a second die. A semiconductor device has the power FET and the speed-up FET monolithically integrated in a “source-down” configuration. A method of operating an output stage of a switched mode power supply alternately turns on and off a high-side and a low-side switch and drives at least one of the switches with a speed-up FET monolithically integrated with the switch.

Boosted-rail amplifier

Abstract: An amplifier device including an amplifier having an input for receiving an audio input signal and an output for sending an output signal to a load A boosted-rail circuit is connected to a power source and has a single boosted rail connected to the BTL amplifier Also, a common-mode circuit is coupled to the boosted-rail circuit and the BTL amplifier The common-mode circuit sends a common-mode signal to the BTL amplifier that will dynamically track the output voltage supplied from the boosted-rail circuit to the BTL amplifier In operation, the boosted-rail circuit reacts to the BTL amplifier and switches from a non-boost mode to a boost mode to increase the output voltage supplied to the BTL when the BTL amplifier requires additional voltage

A high-speed current mode sense amplifier for Spin-Torque Transfer Magnetic Random Access Memory

Abstract: A high-speed current mode sense amplifier for Spin Torque Transfer Magnetic Random Access Memory (STT MRAM) is proposed. The sense amplifier is designed in a 0.18 µm CMOS technology, and 1.8 V supply voltage. The resistance values of high state is 2132 Ω, low state is 1215 Ω, and reference state is 1512 Ω, respectively. The proposed sense amplifier decreases the dropping rate of input bias. In particular, it can reduce the sensing time and the power-delay-product (PDP). In addition, the proposed sense amplifier has higher driving ability.

300 GHz six-stage differential-mode amplifier

Abstract: A 300 GHz amplifier is fabricated using indium-phosphide (InP) double-heterojunction bipolar transistor (DHBT) technology. The cascade chain in the amplifier contains six unit cells each using a differential-pair of common-base DHBTs. A total of six signal lines provide connection to the unit cell to obtain the differential-mode amplifier gain while providing proper dc bias. Measured results show the peak gain of 17.3 dB at 290 GHz with 10-dB gain-bandwidth of 20 GHz. This design technique could be extremely powerful in generating high terahertz amplifier gain.

Amplifier with variable matching circuit to improve linearity

Abstract: Techniques for reducing distortion and improving linearity of amplifiers are described. In an exemplary design, an apparatus includes a driver amplifier, a variable matching circuit, and a power amplifier. The driver amplifier amplifies a first RF signal and provides a second RF signal. The variable matching circuit receives the second RF signal and provides a third RF signal. The power amplifier amplifies the third RF signal and provides a fourth RF signal. The variable matching circuit matches a fixed impedance at the output of the driver amplifier to a variable impedance at the input of the power amplifier in order to improve the linearity of the amplifiers. In an exemplary design, the power amplifier includes a first transistor (e.g., an NMOS transistor) of a first type, and the variable matching circuit includes a second transistor (e.g., a PMOS transistor) of a second type that is different from the first type.

Component Tolerance Effect on Ultra-Wideband Low-Noise Amplifier Performance

Abstract: A study of the component tolerances on an ultra-wideband (UWB) low-noise amplifier designed on a conventional printed circuit board is presented in this paper. The low-noise amplifier design employs dual-section input and output microstrip matching networks for wideband operation with a low noise figure and a flat power gain. First, the effect of passive component and manufacturing process tolerances on the low-noise amplifier performance is theoretically studied by means of sensitivity analyses. Second, simulation and measurement results are presented for verification of the analytical results. It is shown that, compared with a lumped matching network design, a microstrip matching network design significantly reduces the UWB low-noise amplifier sensitivity to component tolerances.

System and method for compensating for changes in an output impedance of a power amplifier

Abstract: System and method for compensating for changes in an output impedance of a power amplifier uses an impedance compensating circuit with an impedance inverter coupled to the power amplifier. The impedance inverter of the impedance compensating circuit is configured such that an output impedance of the impedance inverter is proportional to the inverse of the output impedance of the power amplifier to compensate for changes in the output impedance of the power amplifier.

High efficiency power amplifier for high frequency radio transmitters

Abstract: Modern transmitters usually have to amplify and transmit complex communication signals with simultaneous envelope and phase modulation. Due to this property of the transmitted signal, linear power amplifiers (class A, B or AB) are usually employed as a solution for the power amplifier stage. These amplifiers have high linearity, but suffer from low efficiency when the transmitted signal has high peak-to-average power ratio. The Kahn envelope elimination and restoration (EER) technique is used to enhance efficiency of RF transmitters, by combining highly efficient, nonlinear RF amplifier (class D or E) with a highly efficient envelope amplifier in order to obtain linear and highly efficient RF amplifier. This paper presents solutions for the power supply that acts as the envelope amplifier and class E amplifier that is used as a nonlinear amplifier. The envelope amplifier is implemented as a multilevel converter in series with a linear regulator and can provide up to 100 W of peak power and reproduce sine wave of 2 MHz, while the implemented class E amplifier operates at 120 MHz with an efficiency near to 90%. The envelope amplifier and class E amplifier have been integrated in order to implement the Kahn's technique transmitter and series of experiments have been conducted in order to characterize the implemented transmitter.

Comprehensive First-Pass Design Methodology for High Efficiency Mode Power Amplifier [TC Contests]

Abstract: In this paper, such a first-pass design methodology is presented, taking advantage of the arrival of highly accurate large signal device models. Using the method described, an inverse Class F power amplifier (PA) with minimum tuning is realized, measuring 71% PAE at 3.27 GHz at the 2009 IMS Student Design Competition.