Showing papers on "FET amplifier published in 2012"

A Combined Series-Parallel Hybrid Envelope Amplifier for Envelope Tracking Mobile Terminal RF Power Amplifier Applications

Abstract: An improved envelope amplifier architecture for envelope tracking RF power amplifiers is presented, consisting of two switching amplifiers and one linear amplifier. The first switching amplifier and the linear amplifier provide wideband and high-efficiency operation, while the second switching amplifier provides a reduced bandwidth variable supply to the linear amplifier to further reduce power loss. The first switching amplifier and the linear amplifier are fabricated together in a 150 nm CMOS process, while the second switching amplifier is external. Measurements show a maximum average efficiency of 82% for a 10 MHz LTE signal with a 6 dB PAPR at 29.7 dBm output power and an SFDR of 63 dBc for a single tone of 5 MHz driving an 8 Ω load.

3–3.6-GHz Wideband GaN Doherty Power Amplifier Exploiting Output Compensation Stages

Abstract: We discuss the design, realization and experimental characterization of a GaN-based hybrid Doherty power amplifier for wideband operation in the 3-3.6-GHz frequency range. The design adopts a novel, simple approach based on wideband compensator networks. Second-harmonic tuning is exploited for the main amplifier at the upper limit of the frequency band, thus improving gain equalization over the amplifier bandwidth. The realized amplifier is based on a packaged GaN HEMT and shows, at 6 dB of output power back-off, a drain efficiency higher than 38% in the 3-3.6-GHz band, gain around 10 dB, and maximum power between 43 and 44 dBm, with saturated efficiency between 55% and 66%. With respect to the state of the art, we obtain, at a higher frequency, a wideband amplifier with similar performances in terms of bandwidth, output power, and efficiency, through a simpler approach. Moreover, the measured constant maximum output power of 20 W suggests that the power utilization factor of the 10-W (Class A) GaN HEMT is excellent over the amplifier band.

10 dB small-signal graphene FET amplifier

Abstract: Reported is the realisation of a graphene FET microwave amplifier operating at 1 GHz, exhibiting a small-signal power gain of 10 dB and a noise figure of 6.4 dB. The amplifier utilises a matching inductor on the gate yielding a return loss of 20 dB. The design is optimised for maximum gain and the optimum noise figure is extracted by noise modelling and predicted to be close to 1 dB for the intrinsic graphene FET at this frequency. The presented results complement existing graphene FET applications and are promising for future graphene microwave circuits.

Multimode RF amplifier system

Abstract: Multimode radio frequency (RF) amplifier systems and techniques are disclosed. In one embodiment, a multimode radio frequency (RF) amplifier system has a first RF amplifier and a second RF amplifier. The first RF amplifier may support a first RF communication standard. The second RF amplifier may support a second RF communication standard. The first RF amplifier includes an auxiliary circuit. The auxiliary circuit may provide a service or a utility to a second RF amplifier. For example, the auxiliary circuit may generate a supply voltage to power the second RF amplifier.

Combined filter and transconductance amplifier

Abstract: Embodiments of circuitry, which includes an operational transconductance amplifier and a passive circuit, are disclosed. The passive circuit is coupled to the operational transconductance amplifier. Further, the passive circuit receives an input signal and the operational transconductance amplifier provides an output current, such that the passive circuit and the OTA high-pass filter and integrate the input signal to provide the output signal.

System and Apparatus for Driver Circuit for Protection of Gates of GaN FETs

Abstract: A half-bridge power circuit comprises a first gallium nitride field effect transistor (GaN FET); a first driver coupled to a gate of the first GaN FET; an anode of a capacitor coupled to an output of the driver and a source of the first GaN FET; a diode having a cathode coupled to the cathode of the capacitor; and a bootstrap capacitor clamp (BCC) controller, including: a field effect transistor (FET) coupled to an anode of the diode, and a comparator coupled to a gate of the FET, the comparator configured to receive as inputs: a) a signal representative of an input voltage (VDRV) applied to the FET; b) a ground; c) a boot signal representative of a voltage at the anode of the capacitor (Boot); and d) a signal representative of a voltage at the source of the first GaN FET (SW).

Apparatus and methods for power amplifiers

Abstract: Apparatus and methods for power amplifiers are disclosed. In one embodiment, a power amplifier circuit assembly includes a power amplifier and an impedance matching network. The impedance matching network is operatively associated with the power amplifier and is configured to provide a load line impedance to the power amplifier between about 6 Ω and about 10 Ω. The impedance matching network includes a fundamental matching circuit and one or more termination circuits, and the fundamental matching circuit and each of the of the one or more termination circuits include separate input terminals for coupling to an output of the power amplifier so as to allow the fundamental matching circuit and each of the one or more termination circuits to be separately tuned.

Class e amplifier overload detection and prevention

Abstract: Systems, methods and apparatus are disclosed for amplifiers for wireless power transfer. In one aspect a method is provided for controlling operation of an amplifier, such as a class E amplifier. The method may include monitoring an output of the amplifier. The method may further include adjusting a timing of an enabling switch of the amplifier based on the output of the amplifier.

Converting a Three-Stage Pseudoclass-AB Amplifier to a True-Class-AB Amplifier

Abstract: We convert a low-voltage low-transistor-count wide-swing multistage pseudoclass-AB amplifier proposed by Mita et al. to a true-class-AB amplifier. The conversion is made possible using gate-drain feedback to combine two inverting common- source amplifiers to form a single noninverting stage. Both the pseudoclassand true-class-AB amplifiers were fabricated in a 0.5-μm CMOS 2P3M process. They are designed to operate from ±1.25-V supplies at a nominal quiescent current of 175 μA and a minimum phase margin of 45° when driving capacitive loads from 1 to 200 pF and resistive loads from 500 Ω to 1 MΩ. The total com- pensation capacitance of the proposed class-AB amplifier is 12 pF, which is 50% less than the pseudoclass-AB amplifier. The simu- lated unity-gain frequency of the class-AB amplifier is 4.9 MHz at a load of 25 pF||1kΩ, which is 88% higher than that of the pseudoclass-AB amplifier. Experimental measurements show that the proposed amplifier has a maximum total bias current of 175 μA, as compared with 1.05 mA for the pseudoclass-AB am- plifier. Measured slew rates of the proposed amplifier are 2.7 and 3.3 V/μs, twice as much as those of its pseudoclass-AB counterpart.

Integrated circuit devices including stress proximity effects and methods of fabricating the same

Abstract: An integrated circuit can include first and second FETs of a particular conductivity type on a substrate, wherein a first source/drain region of the first FET is closer to a center of a first channel region of the first FET than a second source/drain region of the second FET is to a center of a second channel region of the second FET.

A Transformer-Coupling Current-Reuse SiGe HBT Power Amplifier for 77-GHz Automotive Radar

Abstract: This paper presents a pseudodifferential power amplifier for 77-GHz automotive radar. The circuit is fabricated in a SiGe HBT BiCMOS technology featuring bipolar transistors with fT/fmax of 230/280 GHz. The amplifier adopts a transformer-coupling current-reuse approach to improve both gain and efficiency. An interstacked transformer is also profitably adopted to reduce output losses due to the differential-to-single-ended conversion. The amplifier exhibits a saturated power, a peak power-added efficiency, and a gain of 14.5 dBm, 9%, and 25 dB, respectively, thus achieving a first-rate figure-of-merit as high as 4755.

Signal path termination

Abstract: This disclosure relates to a harmonic termination circuit that is separate from a load line. In one embodiment, the load line is configured to match an impedance at the power amplifier output at a fundamental frequency of the power amplifier output and the harmonic termination circuit is configured to terminate at a phase corresponding to a harmonic frequency of the power amplifier output. According to certain embodiments, the load line and the harmonic termination circuit can be electrically coupled to the power amplifier output external to a power amplifier die via different output pins of the power amplifier die.

Method and apparatus for amplifying a radio frequency signal

Abstract: A radio frequency (RF) amplifier structure provides highly efficient RF signal amplification across a wide bandwidth, when implemented in both inverting and non-inverting Doherty designs, by employing matching impedance transform circuits that comprise a low pass multiple section inductance-capacitance circuit and that provides impedance matching between the output of an amplifier device and a power combiner, wherein the output matching impedance transform circuit has approximately an odd multiple of 90 electrical degrees over the RF amplifier structure's frequency range of operation, and adjustable phase delay circuits that route an amplified RF signal to the power combiner and that are controllably adjusted based on a frequency of an RF input signal over an operating frequency range of the RF amplifier structure.

Tapered fiber amplifier with high gain and output power

Abstract: We present a high-power ytterbium fiber amplifier based on active tapered double-clad fiber (T-DCF) and capable of high single-pass gain. The T-DCF power amplifier seeded with a 320 mW narrow-band signal generates up to 110 W of average output power corresponding to more than 25 dB gain. The amplifier exhibits near-diffraction-limited beam quality (M 2 = 1.06) at the highest output power, which was limited by the available pump power. With a broadband seed source, the amplifier produced a gain of nearly 40 dB obtained for low-signal limit of the seed. The high output power combined with high gain is achieved owing to amplified spontaneous emission (ASE) filtering and increased stimulated Brillouin scattering (SBS) threshold inherent to the axially non-uniform geometry. The amplifier operates efficiently with a wide range of input seed powers thus providing the basis for one-stage tapered amplifier which combines the functions of preamplifier and power amplifier and can be a competitive alternative to multi-stage design.

High-frequency amplifier module and high-frequency amplifier module unit

Abstract: A high-frequency amplifier module includes a driver-stage amplifier 3 that amplifies an RF signal input thereto from an RF input terminal 1 , and a final-stage amplifier 5 that amplifies the signal amplified by the driver-stage amplifier 3 and outputs the signal after the amplification to an RF output terminal 7 . The driver-stage amplifier 3 is fabricated on a silicon substrate 11 , while the final-stage amplifier 5 is fabricated on a gallium arsenide substrate. This configuration downsizes the cost while maintaining a high-frequency characteristic comparable to that in the case where all components of an entire module are fabricated on a gallium arsenide substrate 71.

A 60 GHz Cascode Variable-Gain Low-Noise Amplifier With Phase Compensation in a 0.13 $\mu{\rm m}$ CMOS Technology

Abstract: A 60 GHz variable-gain low-noise amplifier (LNA) with varactor-based phase compensation is developed using a 0.13 CMOS process. Based on the analysis of the phase variation during the gain control in the cascode-FET unit cell, a simple varactor-based phase compensation method is proposed. A linear bias control scheme for the gate of the common-source FET and the cathode of nMOS varactor at the gate of common-gate FET results in the phase compensation between the two FET's in the cascode cell. The gain control range is also expanded with the proposed approach. The fabricated variable-gain LNA (VG-LNA) shows a small phase variation of 5 ^ over a gain control range of 13 dB.

Modular 20 kW solid state RF amplifier for Indus-2 syncrotron radiation source

Abstract: This article presents the design and development of 5058 MHz modular solid state Radio frequency (RF) amplifier capable of delivering 20 kW continuous RF power It has been successfully commissioned for serving as the modern RF power source in Indus-2 synchrotron radiation source For this amplifier, design procedure has been formulated for the solid state amplifier modules, radial combiner, divider, directional coupler and overall system architecture, with specifications suited to RF source for particle accelerator This article describes underlying design principles and indigenous development of this amplifier, consisting of 400 W amplifier modules, 5 kW 16-port radial combiner/divider and directional couplers Detail performance characterization of amplifier on component level as well as system level serves as useful data for higher power solid state amplifier designers Simple design, indigenous technology, high efficiency and ease of fabrication, are the main features of this design

A 0.85 THz vacuum-based power amplifier

Abstract: A 0.850 THz vacuum electronic power amplifier capable of >100mW output power is being developed at Northrop Grumman Electronic Systems. The compact power amplifier is based on a DRIE-fabricated folded waveguide slow-wave circuit, together with a high current density thermionic cathode, a high field permanent magnet solenoid, and a single-stage depressed collector for overall device efficiency. The new 0.85 THz power amplifier design is based on a 0.67 THz amplifier that achieved over 100mW of output power with 21.5 dB of gain, 15 GHz of operational bandwidth, a collector efficiency of 93% and an overall device efficiency of 0.44%.

Design and characterization of 50 kW solid-state RF amplifier

Abstract: Radio frequency (RF) and microwave amplifier research has been largely focused on solid-state technology in recent years. This paper presents design and performance characterization of a 50-kW modular solid-state amplifier, operating at 505.8 MHz. It includes architecture selection and design procedures based on circuit and EM simulations for its building blocks like solid-state amplifier modules, combiners, dividers, and directional couplers. Key performance objectives such as efficiency, return loss, and amplitude/phase imbalance are discussed for this amplifier for real-time operation. This amplifier is serving as the state-of-the-art RF source in Indus-2 synchrotron radiation source. Characterization on component level as well as system level of this amplifier serves useful data for RF designers working in communication and particle accelerator fields.

Electronic devices with multiple amplifier stages and methods of their manufacture

Abstract: An embodiment of an electrical device includes a device package and a plurality of amplifier paths physically contained by the device package. Each amplifier path includes an amplifier stage electrically coupled between an input and an output to the amplifier stage, and the amplifier stages of the plurality of amplifier paths are symmetrical. In a further embodiment, the amplifier paths have translational symmetry within the device package. In another further embodiment, transistors comprising the amplifier stages of the plurality of amplifier paths are substantially identical in size. The electrical device may be incorporated into an amplifier system that further includes an external input network and an external output network. For example, the amplifier system may be configured in a Doherty amplifier topology.

X-Band CMOS Power Amplifier Using Mode-Locking Method For Sensor Applications

Abstract: An X-band CMOS power amplifier using a mode-locking method for sensor applications is designed with a TSMC 0.13-μm RF CMOS process. The cascode structure is adapted to remove the reliability problems between the drain and gate voltages of the NMOS. Additionally, the mode-locking method is used to improve the efficiency and gain of the amplifier. We proposed the method to adapt the mode-locking topology to the cascode structure. The measured power added efficiency is 27%, while the saturated output power is 14 dBm at an operation frequency of 8.9 GHz. The designed chip size is 700 by 550 μm2.

Physical unclonable function cell and array

Abstract: A function cell comprising a first field effect transistor (FET) device, a second FET device, a first node connected to a gate terminal of the first FET device and a gate terminal of the second FET device, wherein the first node is operative to receive a voltage signal from an alternating current (AC) voltage source, an amplifier portion connected to the first FET device and the second FET device, the amplifier portion operative to receive a signal from the first FET device and the second FET device, a phase comparator portion having a first input terminal connected to an output terminal of the amplifier and a second input terminal operative to receive the voltage signal from the AC voltage source, the phase comparator portion operative to output a voltage indicative of a bit of a binary value.

Multi-stage fully differential amplifier with controlled common mode voltage

Abstract: Disclosed are systems and methods to achieve a low noise, fully differential amplifier with controlled common mode voltages at each stage output but without the requirement of a common mode feedback loop. Common mode voltages are adjusted by adjusting the currents flowing through the load impedances (bias currents) wherein the currents are derived from one or more voltage-to-current converters based on an impedance that matches to the load impedances of the stages of the amplifier. The amplifier invented is primarily used for amplification of low frequency signals. The amplifier has one or more gain stages applying only one conduction type of transistors of an IC technology that has the lowest transition frequency between 1/f noise and white noise to achieve a low chopping or autozeroing frequency.

Wideband doherty amplifier circuit with peaking impedance absorption

Abstract: A wideband Doherty amplifier circuit includes a main amplifier configured to operate in a linear mode, a peaking amplifier configured to operate in a non-linear mode and a Doherty combiner directly connected to an output of each amplifier so that no output match devices are in the path between the amplifier outputs and the Doherty combiner. The Doherty combiner is configured to present the same load impedance to each amplifier when both amplifiers are conducting and present a modulated load impedance to the main amplifier when the peaking amplifier is non-conducting so that a variation in the VSWR seen by the main amplifier is less than 5% over a plurality of frequency bands and/or so that the peaking amplifier has an off-state impedance spreading of 20 degrees or less over the plurality of frequency bands.

400 GHz HBT Differential Amplifier Using Unbalanced Feed Networks

Abstract: A terahertz differential eight-stage amplifier fabricated using state-of-the-art 125 nm double-heterojunction bipolar transistors (DHBT) is presented. The four-port unit-cell chain is designed for optimum forward differential gain with no even and odd-mode reverse gains. Unbalanced single-ended feed networks are added to preserve the amplifier gain without inducing oscillations. The proposed feed scheme is validated by a stable amplifier operation in 325-to-450 GHz range with the peak gain of 22 dB at 375 GHz.

System providing switchable impedance transformer matching for power amplifiers

Abstract: System providing switchable impedance transformer matching for power amplifiers. In an exemplary implementation, an amplifier providing switchable impedance matching includes an output inductor (L1) that is part of an output path of the amplifier and a first amplifier stage comprising a first inductor (L4) coupled to the output inductor, the first inductor configured to couple a signal amplified by the first amplifier stage at a first power level to the output inductor in response to a first enable signal. The amplifier also includes a second amplifier stage comprising a second inductor (L5) coupled to the output inductor, the second inductor configured to couple the signal amplified by the second amplifier stage at a second power level to the output inductor in response to a second enable signal.

An ultra-broadband low-noise traveling-wave amplifier based on 50nm InGaAs mHEMT technology

Abstract: A monolithic integrated eight-stage traveling-wave amplifier (TWA) is presented that has been developed and fabricated using a 50nm InGaAs metamorphic HEMT technology. High-impedance coplanar waveguides (CPW) are used as compensation for the input and output capacitances of the stages, consisting of two transistors in a cascode configuration. A small signal gain of 11dB with a ripple of around ±1dB and a 3dB bandwidth of more than 110GHz is achieved. The noise figure (NF) is as low as 2.5dB at the best and less than 5dB for frequencies up to 90GHz. Furthermore, the amplifier provides an 1-dB-compression-point of 7dBm and a saturated output power of about 11dBm at 75GHz.

Front-end amplifier

Abstract: A front-end amplifier has an impedance detector that detects an impedance seen looking into an antenna side from a power amplifier from a radio-frequency signal output from the power amplifier and a radio-frequency signal reflected from the antenna, in which a control circuit decides on whether the impedance detected by the impedance detector belongs to a specific region or not, and controls, if the impedance belongs to the specific region, at least one of the bias condition of the power amplifier and the impedance of a variable-matching circuit.

Mixed mode dual switch

Abstract: Various aspects of the technology provide for a converter circuit such as a dc-dc voltage converter or buck converter The circuit includes a enhancement mode control Field Effect Transistor (FET) fabricated using gallium arsenide and an depletion mode sync FET fabricated using gallium arsenide A drain of the sync FET may be coupled to a source of the control FET and an inductor may be coupled to the source of the control FET and the drain of the sync FET

Verifying oscillation in amplifiers and the mitigation thereof

Abstract: A method is provided for detecting and mitigating oscillation in an amplifier. The amplifier is configured to sample a signal being amplified to determine whether the amplifier is oscillating. In addition, the status of the amplifier can be verified based on the apparent signal levels of the signals being amplified. The gain of the amplifier is then adjusted in accordance with whether the amplifier is oscillating or as necessary to maintain gain that is compatible with the system within which the amplifier is operating.