FET amplifier

About: FET amplifier is a research topic. Over the lifetime, 7048 publications have been published within this topic receiving 77549 citations.

GaAs Dual-gate FET frequency discriminator

Abstract: A microwave frequency discriminator comprising a dual-gate field effect transistor (FET) amplifier, bias circuits and a detector. The FET is biased to produce an output RF signal within a predetermined frequency bandwidth in response to an input RF signal. A limiter provides a substantially constant power level of the input RF signal to the FET. A detector biasing circuit is used to match electronically the output impedance of the FET to the input impedance of the detector. At such impedance conditions a dc output voltage of the detector varies substantially linearly throughout the frequency bandwidth as a function of the frequency of the input RF signal, approximating the characteristic of a frequency discriminator.

Signal path termination

Abstract: This disclosure relates to a harmonic termination circuit that is separate from a load line. In one embodiment, the load line is configured to match an impedance at the power amplifier output at a fundamental frequency of the power amplifier output and the harmonic termination circuit is configured to terminate at a phase corresponding to a harmonic frequency of the power amplifier output. According to certain embodiments, the load line and the harmonic termination circuit can be electrically coupled to the power amplifier output external to a power amplifier die via different output pins of the power amplifier die.

Power amplifier combiner for improving linearity of an output

Abstract: A high power amplifier combiner for improving the linearity of an output of an amplifier. At least two prelinearizers are used to suppress all distortion products by using feedforward cancelling techniques. The effects of compression associated with the operation of the high power amplifier are reduced.

Sense amplifier with integrated latch and level shift

Abstract: A sense amplifier having an ingegrated latch with level shift is disclosed, in which a pair of cross-connected inverters are connected between the outputs of the sense amplifier to provide a single stage amplifier. The sense amplifier performs level shift, sense amplifier and latching functions within a single circuit, thus reducing layout area and simplifying chip design while at the same time providing full swing complementary outputs. In addition, the sense amplifier is turned on for only a portion of the cycle to enable the data to be latched, with virtually no constant current comsumption in the circuit for holding the data, thereby reducing power consumption. Alternative embodiments are disclosed using conventional and tri-state latches.

High speed, fine-resolution gain programmable amplifier

Abstract: An integrated circuit differential amplifier with a digitally controllable gain. In a preferred embodiment, the differential amplifier employs first and second transconductance (gm) amplifiers and a digital to analog converter (DAC). The first gm amplifier converts a differential input voltage into a differential output current and the second gm amplifier converts the differential output current into a differential output voltage. A digital input code is applied to the DAC to generate an analog output voltage that is applied to one of the gm amplifiers to control its transconductance to thereby control the gain of the differential amplifier. The second gm amplifier employs a pair of low impedance feedback paths between input/output terminals of opposite polarity. The gain of the differential amplifier is thus a function of the ratio of the transconductance of the first gm amplifier to that of the second gm amplifier. Preferably, the same circuit topology is employed for both gm amplifiers, leading to a process- and operating temperature-insensitive differential amplifier gain. Additional gm amplifiers may be connected in parallel with the first gm amplifier to enhance gain. The load resistance presented by the second gm amplifier is preferably kept low to afford high speed operation.