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FET amplifier

About: FET amplifier is a research topic. Over the lifetime, 7048 publications have been published within this topic receiving 77549 citations.


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Patent
12 Sep 2000
TL;DR: An RF power amplifier is provided for use with wireless transmission systems such as cellular phones as mentioned in this paper, where the inductive devices may be magnetically or capacitively coupled together together.
Abstract: An RF power amplifier is provided for use with wireless transmission systems such as cellular phones. An RF power amplifier includes direct drive amplifier circuitry operating in a push-pull scheme. The RF power amplifier includes a pair of switching devices driven by a pair of mutually coupled inductive devices. The inductive devices may be magnetically or capacitively coupled together. The RF power amplifier may be formed on a single integrated circuit and include an on-chip bypass capacitor. The RF power amplifier may utilize a voltage regulator for providing a regulated voltage source. The RF power amplifier may be provided using a dual oxide gate device resulting in an improved amplifier. The RF power amplifier may be packaged using flip chip technology and multi-layer ceramic chip carrier technology.

32 citations

Journal ArticleDOI
TL;DR: In this paper, a high efficiency GaAs FET power amplifier with a total efficiency of 70% and an output power of 2 W was achieved in the 900 MHz band by using the even-order harmonic tuning of an output matching circuit.
Abstract: A high-efficiency GaAs FET power amplifier having a total efficiency of 70% and an output power of 2 W is realised in the 900 MHz band. A drain efficiency of 80% was achieved at a low operation voltage of 6 V. These high efficiencies were obtained by using the even-order harmonic tuning of an output matching circuit. Important parameters for achieving this efficiency are also clarified.

32 citations

Journal ArticleDOI
TL;DR: In this article, the authors describe a CMOS rail-to-rail class AB operational amplifier designed to have extremely low output impedance and large current-drive capability, which is suitable for low voltage battery-powered applications.
Abstract: This paper describes a CMOS rail-to-rail class AB operational amplifier designed to have extremely low output impedance and large current-drive capability. The amplifier uses an innovative output stage, having both source follower and common source stages working simultaneously throughout the output common-mode range. The source follower ensures low output impedance, which enables it to drive relatively large load capacitors, while the common-source gain stage provides high current drive. Furthermore, the circuit is fully functional with supplies as low as 1.5 V. The amplifier is capable of driving a maximum output current of /spl plusmn/7 mA with only 140 /spl mu/A of total quiescent current, making it power efficient, and thus appropriate for low voltage battery-powered applications.

32 citations

Patent
05 Jun 1992
TL;DR: In this paper, a sense amplifier for a static memory includes two pull-up transistors and a circuitry is provided for precharging the drains of both transistors to a selected voltage such that by the start of the tracking stage of the amplifier, both pull-ups are off.
Abstract: A sense amplifier for a static memory includes two pull-up transistors. The gate of each transistor is coupled to the drain of the other transistor. A circuitry is provided for precharging the drains of both pull-up transistors to a selected voltage such that by the start of the tracking stage of the amplifier, both pull-up transistors are off. If the tracking stage is long enough, one pull-up transistor turns on while the other one remains off, so that before the start of the sensing stage both pull-up transistors reach their final ON/OFF states. Hence the amplifier is fast and power efficient. The memory bit lines are precharged to VCC before the tracking stage, improving the read-disturb immunity and hence allowing a wider range of voltages on the bit lines and the sense amplifier inputs. The noise immunity and tolerance to temperature process variations are improved as a result. The high noise immunity make the amplifier and the memory suitable for integration with noisy circuits such as CPUs. High speed, high power efficiency, high noise immunity, high tolerance to temperature and process variations and high permissible range of bit line voltages make the memory and the amplifier suitable for low-voltage power supplies such as VCC=3.0 V supplies used in lap-top, notebook, sub-note book, and hand-held computers.

32 citations

Patent
17 Dec 1979
TL;DR: In this paper, a half-bridge inverter having first and second power FETs is provided with a high-speed, highly efficient drive circuit for driving the FET from a single control signal.
Abstract: A half-bridge inverter having first and second power FETs is provided with a high-speed, highly efficient drive circuit for driving the FETs from a single control signal. A single 15 V supply provides energy for charging the gate electrode of the first FET, as well as for a floating source for charging the gate electrode of the second FET. A single bipolar transistor receives the control signal for controlling operation of the first FET, while a current source, a bipolar transistor in series with a resistor, receives the control signal to effect operation of a third bipolar transistor, thereby to control operation of the second FET.

32 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20231
20227
20211
20202
20193
20184