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FET amplifier

About: FET amplifier is a research topic. Over the lifetime, 7048 publications have been published within this topic receiving 77549 citations.


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Patent
02 Nov 1988
TL;DR: In this paper, an amplifier circuit has an FET connected in series with a resistor coupled to a constant voltage source, coupled between a pair of amplifiers such as audio amplifiers in a two-stage amplifying circuit.
Abstract: An amplifier circuit having an FET connected in series with a resistor coupled to a constant voltage source, coupled between a pair of amplifiers, such as audio amplifiers in a two-stage amplifying circuit. The FET specifically and directly determines the amount of gain of the two-stage amplifier, or the like. RDS of the FET is continually monitored by its connection to one input of an amplifier serving as a comparator, with the other input thereof serving as a reference voltage derived from a modulated signal emanating from a microprocessor. Each of the signals VDS, and the reference from the microprocessor is filtered through a low pass filter to remove the audio, or other cyclical signals, and, in the latter case, in order to provide a substantially constant reference voltage to the input of the comparator. The output of the comparator is coupled to an RC circuit, the capacitor thereof being continually charged and discharged in response to the state of the output of the comparator. The output from the RC circuit is coupled to the FET to define the gate voltage of VGS thereof, which in turn determines the value of RDS , to thereby continually alter RDS, to thereby provide the gain so desired and specifically required in the amplifying circuitry. Such value is inherently defined by the modulated reference signal emanating from the microprocessor.

31 citations

Proceedings ArticleDOI
03 Jun 2007
TL;DR: In this article, a saturation Doherty power amplifier with inverse class F harmonic control circuit using Freescale MRF281SR1 LDMOSFET with a 4-W peak envelope power (PEP) was proposed.
Abstract: We have developed a saturation Doherty amplifier which has higher efficiency than the conventional or linear Doherty amplifier. The proposed Doherty amplifier is based on the saturation amplifiers with the harmonic control circuit. We have analyzed the efficiency and the saturation operation of the amplifier related to the load modulation. To interpret the saturation operation according to the power level and harmonic cancellation mechanism, we have simulated the voltage and current waveforms and the IM3 amplitudes and phases of the carrier and peaking amplifiers. For verification, we have implemented the saturation Doherty power amplifier with inverse class F harmonic control circuit using Freescale MRF281SR1 LDMOSFET with a 4-W peak envelope power (PEP). For a 1-GHz forward-link WCDMA signal, the measured drain efficiency of the amplifier is 54.7%, and the measured adjacent channel leakage ratio (ACLR) is -29.4 dBc at an average output power of 32 dBm, while those of the comparable the inverse class F amplifier are 38.7% and -21.4 dBc at the same average output power level, respectively.

31 citations

Patent
29 Jun 1982
TL;DR: In this article, a transformer drive circuit for a high voltage field effect transistor has been proposed, which includes a small transformer coupled to the gate and source with a diode in series at the gate, so that a short on-drive pulse charges the gate capacitance, and the charge is held by the diode.
Abstract: The high voltage field effect transistor has a drive circuit for pulse width modulation, which includes a small transformer coupled to the gate and source with a diode in series at the gate, so that a very short on-drive pulse charges the gate capacitance, and the charge is held by the diode. Another FET has its output connected between the gate and source of the high voltage FET, and its input coupled to another small transformer so that it is turned on for a short time by a very short off-drive pulse to discharge the gate capacitance and thus turn off the high voltage FET. A transformer drive circuit includes two one-shot devices connected to the pulse width modulator as leading and trailing edge detectors respectively, with their outputs connected via FET's to the on-drive and off-drive transformer primaries respectively, to provide pulses of 100-200 nanoseconds.

31 citations

Journal ArticleDOI
TL;DR: In this paper, a fully differential low-noise amplifier topology has been analyzed and implemented in microstrip technology with discrete surface mount components for radio astronomy applications, and the amplifier design is made for an active receiving dense antenna array.
Abstract: In this paper, differential low-noise amplifiers are presented as a very powerful solution for radio astronomy applications. A fully differential amplifier topology has been analyzed and implemented in microstrip technology with discrete surface mount components. The amplifier design is made for an active receiving dense antenna array. Thus, the differential amplifier source impedance is no longer 50 Ω, but 150 Ω from the proposed bunny-ear antennas. A full characterization in terms of gain and noise has been undertaken. Source-pull measurements have been included in order to evaluate the performance of the amplifiers operating with variable source impedances. Noise temperatures below 55 K have been obtained for the differential design in the 300-1000-MHz band for the 150-Ω impedance. In addition, the results for different scanning angles are also presented.

31 citations

Journal ArticleDOI
TL;DR: In this paper, a microwave Doherty power amplifier (DPA) topology with neither the impedance inverting network nor offset lines is proposed, which enables the enhancement of amplifier bandwidth and achieves a more compact amplifier size.
Abstract: A microwave Doherty power amplifier (DPA) consists of a carrier amplifier (CA), a peaking amplifier (PA), and an impedance inverting network. In this paper, a novel DPA topology with neither the impedance inverting network nor offset lines is proposed. This topology enables the enhancement of amplifier bandwidth and achieves a more compact amplifier size. To remove the impedance inverting network and to realize high efficiency at large back-off power level, the output-matching network of the CA is designed to realize high performance both at a low signal power level in the off-state of the PA and at the saturated signal power level. A 1.9-GHz series-connected load Doherty power amplifier without an impedance inverting network is designed and fabricated using GaN HEMTs. The amplifier achieves a power-added efficiency (PAE) of 50% under a 6-dB output back-off from a 34-dBm saturated output power with a PAE of 59%. A maximum PAE higher than 44% is obtained over a frequency range of 1.63–1.98 GHz.

31 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20231
20227
20211
20202
20193
20184