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FET amplifier

About: FET amplifier is a research topic. Over the lifetime, 7048 publications have been published within this topic receiving 77549 citations.


Papers
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Patent
Junji Itoh1
17 Dec 1996
TL;DR: In this paper, a transmitter-receiver circuit for radio communication, comprising a low-noise receiver amplifier (20), a first matching circuit (40) which converts the input impedance of the amplifier, a transmitter amplifier (10) including a second matching circuit 50 and a third matching circuit 60 which convert the impedances to transmitting signals, and a mode switch (30) for changing from transmitting to receiving and vice versa, is described.
Abstract: A transmitter-receiver circuit for radio communication, comprising a low-noise receiver amplifier (20); a first matching circuit (40) which converts the input impedance of the amplifier (20); a transmitter amplifier (10) including a second matching circuit (50) and a third matching circuit (60) which convert the impedances to transmitting signals; and a mode switch (30) for changing from transmitting to receiving and vice versa. The transmitter amplifier (10) has a control terminal (14) connected to the gate electrode of a high-power FET (12), and the output terminal (15A) of the amplifier (10) is connected to an antenna (80) not through the switch (30).

31 citations

Patent
Thomas Yuen-Kit Wong1
16 May 1996
TL;DR: In this paper, a fully differential distributed amplifier for providing high frequency, high power output is presented, where the inherent base-collector capacitance of the output power transistors of each distributed amplifier is matched with on-chip inductances to create artificial transmission lines for both the input and output paths.
Abstract: A fully differential distributed amplifier for providing a high frequency, high power output The inherent base-collector capacitance of the output power transistors of each distributed amplifier is matched with on-chip inductances to create artificial transmission lines for both the input and output paths The distributed amplifier circuit may be used as a driver for a Mach-Zehnder optical modulator In this application an output of 3V peak-to-peak per modulator arm is delivered at 10 Gb/s

31 citations

Patent
Bumman Kim1
10 Sep 1990
TL;DR: In this paper, a circuit to reduce the gate loss in a semiconductor travelling wave power amplifier using series capacitors on the gate feeding lines for a distributed amplifier design is described, which significantly increases the gate width of the amplifier with a resultant increase of the broadband output power and efficiency.
Abstract: The disclosure relates to a circuit to reduce the gate loss in a semiconductor travelling wave power amplifier using series capacitors on the gate feeding lines for a distributed amplifier design. The circuit arrangement significantly increases the gate width of the amplifier with a resultant increases of the broadband output power and efficiency.

30 citations

Patent
20 Feb 2015
TL;DR: In this article, a wireless Josephson-junction-based amplifier is described that provides improved tunability and increased control over both a quality factor Q and participation ratio p of the amplifier.
Abstract: A wireless Josephson-junction-based amplifier is described that provides improved tunability and increased control over both a quality factor Q and participation ratio p of the amplifier. The device may be fabricated on a chip and mounted in a waveguide. No wire bonding between the amplifier and coaxial cables or a printed circuit board is needed. At least one antenna on the chip may be used to couple energy between the waveguide and wireless JBA. The amplifier is capable of gains greater than 25 dB.

30 citations

Patent
Alf Olsen1
30 Aug 2006
TL;DR: In this paper, the authors describe a method for offset cancellation in an amplifier, where the amplifier inputs may be exposed to large loads from an array of pixel columns coupled in parallel.
Abstract: Methods, devices, and systems for offset cancellation in an amplifier are disclosed, wherein the amplifier inputs may be exposed to large loads from an array of pixel columns coupled in parallel. During a cancellation phase, an amplifier offset may be canceled by selectively coupling a first amplifier output to a first amplifier input and a second amplifier output to a second amplifier input. During a portion of the cancellation phase, a buffer may use the first amplifier input to drive a first pixel signal. During a different portion of the cancellation phase, the buffer may use the second amplifier input to drive a second pixel signal. To sense the pixel columns during an amplification phase, the first and second pixel signals are coupled to the first and second amplifier inputs, respectively, with the result that the amplifier offset and the buffer offset are cancelled from the amplifier output.

30 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20231
20227
20211
20202
20193
20184