FET amplifier

About: FET amplifier is a research topic. Over the lifetime, 7048 publications have been published within this topic receiving 77549 citations.

System and method for driving a power field-effect transistor (FET)

Abstract: A system and method are provided for driving a power field-effect transistor (FET). In one embodiment, a system comprises a control circuit (54) that generates a control signal (56) to provide a gate voltage of the power FET. The system further comprises a slope control circuit (62) coupled between the control circuit and the power FET that is operative to dynamically control the rate-of-change of a gate voltage of the power FET to reduce electro-magnetic interference (EMI) emissions and power loss resulting from switching the power FET.

High-Efficiency and High-Power Microwave Amplifier Using GaN-on-Si FET With Improved High-Temperature Operation Characteristics

Abstract: We have successfully developed high-efficiency and high-power microwave amplifiers using a GaN field-effect transistor (FET) on a low-resistivity (LR) Si substrate for the first time. By introducing the LR Si substrate whose resistivity is less sensitive over temperature, the efficiency characteristics in high-temperature operation were significantly improved. In order to overcome the RF loss increase due to the utilization of the LR Si substrate, we have optimized the device structure of the FET by using an RC loss model accounting for drain-to-source capacitance (Cds) and substrate resistance. High-efficiency characteristics were realized by optimizing the buffer structure and electrode structure. Furthermore, we have investigated efficiency improvement by second harmonic termination. The developed single-ended amplifier realized the saturation output power (Psat) of 54 dBm, the linear gain (GL) of 19 dB, and the high efficiency of 33.5% at 8-dB back-off output power level under a WCDMA signal condition of 2.14 GHz at 50-V operation. The inverted Doherty amplifier using a pair of the 250-W GaN FETs delivered the Psat of 57.3 dBm with the GL of 15.5 dB under a pulsed continuous wave signal condition of 2.14 GHz, and demonstrated the digital pre-distortion linearization characteristics with the high efficiency of 48% and the adjacent channel leakage power ratio of -55 dBc at 50 dBm. These results are comparable to the best performance among the ever reported GaN on SiC FET high-power amplifiers.

Operational amplifier circuit with an extended input voltage range

Abstract: An operational amplifier circuit 21 comprises transistors N14, N15 in a first output amplifier circuit 24, and transistors P24, P25 in a second output amplifier circuit 25. When a second differential amplifier circuit 23 is cut off, the output is driven by transistor P13 and transistors N14, N15. When a first differential amplifier circuit 22 is cut off, the output is driven by transistor N23 and transistors P24, P25. Therefore, if such a voltage as to cut off one differential amplifier circuit is given from opposite phase and in-phase input terminals 31, 32, the output can be produced. In such constitution, without using depletion type transistors that require particular manufacturing process, the range of the voltage that can be entered in the input terminal can be extended.

Overdrive thermal distortion compensation for a quinn cascomp amplifier

Abstract: The cascomp amplifier is modified to provide a dynamic biasing circuit which varies the bias point of the cascomp amplifier in proportion to the change in the true bias point of the main channel pair to allow full thermal V be error correction for overdrive conditions and for common-mode signals. A buffer amplifier senses the average voltage of the main channel input transistor emitters and generates a voltage proportional to this average which is added to the biasing network for the cascomp amplifier common-base amplifier transistors.

Method and apparatus for an improved linear transmitter

Abstract: An amplifier structure (200) includes a main amplifier loop (203) for efficiently amplifying an input signal at a power amplifier (228) coupled to a load susceptible to impedance variations. The amplifier loop (200) further includes an auxiliary loop (201) coupled to the main loop (201) for simultaneously preventing the power amplifier (228) from operating inefficiently or causing off-channel interference.