FET amplifier

About: FET amplifier is a research topic. Over the lifetime, 7048 publications have been published within this topic receiving 77549 citations.

Negative feedback variable gain amplifier circuit

Abstract: A variable gain amplifier circuit in which a feedback circuit that feeds back the output signal of an amplifier from its output terminal to its input terminal is composed of an FET. The gate terminal of the feedback FET is connected to the output terminal of the amplifier through a capacitor, and the source terminal of the feedback FET is connected to the input terminal of the amplifier. The gain of the amplifying circuit is controlled by varying the transconductance of the feedback FET by controlling a bias voltage applied to the gate or drain terminal of the feedback FET. This makes it possible to control the gain independently of the physical dimension of the feedback FET, and at the same time, to prevent the input signal from being transmitted from the input side to the output side through the feedback circuit.

Bandpass filter with an active element

Abstract: An amplifier including an in phase feedback signal to therefore exhibit negative resistance is receptive of an input alternating signal which includes a frequency F. The output of the amplifier is coupled to a resonator adjusted to a center frequency F and having undesirable resistance which is offset by the negative resistance of the amplifier. The resonator includes an inductor and adjustable capacitor arranged either in series or in parallel with the amplifier to therefore change the value of F.

Switching regulator having high current prevention features

Abstract: A switching circuit has a pull-up FET (16H) and a pull-down FET (16L) coupled to a load circuit (46), each FET having a control terminal coupled to a current regulating circuit (14). The current regulating circuit provides a high predetermined current for a relatively short duration to the gates of the FETs to quickly turn on or turn off the FETs. After the short duration, a low quiescent current is applied to the gates to maintain the FETs in their present states. An inhibiting circuit (27), coupled between the pull-up FET and the pull-down FET, detects the states of the FETs and delays turn-on of one FET until the other FET has turned off. An overcurrent circuit (60) monitors a current through a switching FET and turns off the FET after a predetermined time delay when an overcurrent condition is detected. The overcurrent circuit then turns on the FET after another predetermined time delay.

Transistor amplifier stage

Abstract: A transistor amplifier stage, in particular an RF amplifier stage with an npn amplifier transistor, which is coupled with its base to an alternating voltage input terminal, with its emitter to a fixed potential, and with its collector to an alternating voltage output terminal. An active operating point stabilization unit with a first and a second pnp transistor is provided between a direct voltage input terminal and the base of the npn amplifier transistor.