FET amplifier

About: FET amplifier is a research topic. Over the lifetime, 7048 publications have been published within this topic receiving 77549 citations.

Amplifier device for a condenser microphone

Abstract: A common-source type buffer amplifier circuit has a microphone capsule, a diode and an FET. An output end of the buffer amplifier circuit, or a drain of the FET is connected to an input end of the current mirror circuit. An output end of the current mirror circuit is connected to one end of a load resistor of which the other end is grounded. A voltage across the load resistor corresponds to an output of the amplifier and is supplied to the speaker amplifier.

Switching amplifiers into and out of circuits with reduced output noise

Abstract: An insubstantial amount of noise results at the output of a circuit when an output of a primary amplifier is disconnected from and reconnected to the circuit in which is operating. The primary amplifier is placed temporarily in a muting configuration. A secondary amplifier permanently in a muting configuration is connected in parallel with the primary amplifier. The output of the primary amplifier then is disconnected from a circuit node to which it is attached. The primary amplifier may then be taken out of its muting configuration. After, for example, configuring the primary amplifier as a comparator and calibrating its dc-offset voltage, the primary amplifier is placed back into a muting configuration. The secondary amplifier then is disconnected from the primary amplifier. The primary amplifier may subsequently be taken out of muting configuration to resume its normal function in the circuit.

Sound-responsive light

Abstract: A sound-responsive light illuminated by an audio-actuated serially connected switch. The audio-actuated switch includes a thyristor, preferably an SCR, the gate of which is triggered by an audio frequency signal from a microphone and audio amplifier. The amplifier is a class A audio amplifier with biasing and loading provided so that the light will be illuminated by sound above a selected level. A nonlinear potentiometer is used for the load impedance of one of the amplifier stages to permit selection of the desired audio level which triggers the thyristor. The input terminals of a rectified power supply are connected across the principal terminals of the SCR so that the parallel combination may be connected in series with the electric light and an alternating current power source. Coupling is provided from the output of the audio amplifier to the gate of the thyristor by means of a series capacitor and a shunt gate resistor of approximately 1000 ohms.

Enhanced performance optical receiver having means for switching between high and low amplifier configurations

Abstract: A transimpedance front end is provided for an optical receiver which includes a photodetector coupled optically to an optical fiber for receiving optical signals over the fiber and connected electrically to the front end. The front end comprises a buffer amplifier connected to the photodetector, a first amplifier selectively connected to the buffer through a first switch and through a first, high value feedback resistor in order to define a first mode low optical signal level amplifier configuration, a second amplifier selectively connected to the buffer through a second switch and through a second, switched low value resistor to define a second mode high optical signal level amplifier configuration, and an optical level sensing and switching control circuit connected to the photodetector for sensing incoming optical signal level and for switching between the first and second amplifier configurations as a function thereof.

A 1.5-V high drive capability CMOS op-amp

Abstract: A novel CMOS operational amplifier with a 1.5 V power supply is presented. It is based on a folded-mirror transconductance amplifier and a high-efficiency output stage. The amplifier achieves an open-loop gain and a gain-bandwidth product higher than 65 dB and 1 MHz, respectively. In addition, a 1 V peak-to-peak output voltage into a 500 /spl Omega/ and 50 pF output load is provided with a total harmonic distortion of -77 dB. This performance was achieved using maximum aspect ratios of 120/1.2 and 360/1.2 for the NMOS and PMOS transistors, respectively, and a quiescent current as low as 60 /spl mu/A for the driver transistors. The amplifier was implemented in a standard 1.2 /spl mu/m CMOS process with threshold voltages around 0.8 V. It dissipates less than 300 /spl mu/W.