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FET amplifier

About: FET amplifier is a research topic. Over the lifetime, 7048 publications have been published within this topic receiving 77549 citations.


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Patent
02 Aug 1984
TL;DR: In this paper, a CMOS sense amplifier for a dynamic read/write memory employs a latch circuit with cross-coupled N-channel transistors and cross-Coupled P-Channel transistors, returned to the voltage supply and ground through P and N channel transistors selectively activated by sense clocks.
Abstract: A CMOS sense amplifier for a dynamic read/write memory employs a latch circuit with cross-coupled N-channel transistors and cross-coupled P-channel transistors, returned to the voltage supply and ground through P and N channel transistors selectively activated by sense clocks. Differential inputs of the sense amplifier are connected to the bit lines. The N-channel transistors are employed for initial sensing, and then both N-channel and P-channel transistors in sequential order for amplification and restoring the 1-level. This results in better balance, and smaller N and P channel latch transistors may be used, saving area, saving power and increasing speed.

24 citations

Journal ArticleDOI
TL;DR: In this paper, a Tl-Ca-Ba-Cu-O superconducting flux flow transistor (SFFT) was used as an active impedance converter between Josephson and FET circuitry.
Abstract: A Tl-Ca-Ba-Cu-O superconducting flux flow transistor (SFFT) was used as an active impedance converter between Josephson and FET circuitry. The input of the flux flow device is a control line of low impedance that can be driven by a tunnel junction. The output is the signal across the SFFT which is made of a parallel array of weak links. The output impedance is typically greater than 5 Omega , with a maximum voltage swing of over 100 mV into a 50- Omega system. The switching of an all-Nb junction induced a 90-mV voltage swing at the FET input and over 200 mV at the FET output. The line driver can operate anywhere between 4.2 K and 85 K with minor changes in speed (+or-5 ps) and output level (+or-10 mV). The switching time measured was about 100 ps and was fixture limited.

24 citations

Journal ArticleDOI
TL;DR: An AC-coupled amplifier that offers a high input impedance, thus making it suitable for bioelectric signal amplification, is discussed and the necessary formulas for calculating its input impedance and transfer function in order to facilitate its adaptation to different applications are presented.
Abstract: An AC-coupled amplifier that offers a high input impedance, thus making it suitable for bioelectric signal amplification, is discussed. The necessary formulas for calculating its input impedance and transfer function in order to facilitate its adaptation to different applications are presented. By using the appropriate equations, it is possible to choose the value of the output impedance, the maximum overshooting in the frequency response, and the low corner frequency. The effective input impedance is limited by common mode input capacitances associated not only with the operational amplifier, but also with input protections, RF filter, and circuit layout. These capacitances provide an increased impedance near frequency of resonance. >

24 citations

Patent
David E. Fulkerson1
11 Apr 1988
TL;DR: In this paper, an improved FET capacitance driver logic circuit has been proposed to allow the output FET to have a large capacitance charging current surge followed by a reduced conduction thereafter.
Abstract: An improved FET capacitance driver logic circuit having an inverter feedback stage 22 connected from output to input of output FET 23 to allow the output FET to have a large capacitance charging current surge followed by a reduced conduction thereafter.

24 citations

Patent
30 Sep 1986
TL;DR: In this paper, a switch capacitor summing amplifier is described as having a coupling to couple desired signals to the active amplifier in response to an enable signal, which is performed in synchronism to the "odd" phase of the sampling signals.
Abstract: A switch capacitor summing amplifier is disclosed having a coupling means to couple desired signals to the active amplifier in response to an enable signal. The coupling is performed in synchronism to the "odd" phase of the sampling signals thereby improving noise, transient and DC offset performance while minimizing switch impedance sensitivity.

24 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20231
20227
20211
20202
20193
20184