FET amplifier

About: FET amplifier is a research topic. Over the lifetime, 7048 publications have been published within this topic receiving 77549 citations.

MOS FET amplifier output stage

Abstract: An output circuit particularly adapted for use in a pulse width modulation amplifier having a significantly reduced power loss during switching times. Inductors are coupled in series with the signal channels of two push-pull connected switching elements. High-speed diodes are coupled in parallel with the series combinations of switching elements and inductors.

Integrated circuit amplifier having an improved gain-versus-frequency characteristic

Abstract: Disclosed is an operational amplifier including an input differential amplifier stage and an output driver stage, with each of the input and output stages having pole compensating capacitance means therein for improving the gain-versus-frequency characteristic of the amplifier. The output pole compensating capacitance means is a high voltage MOS capacitor which splits two of the poles of the amplifier''s transfer function, broadbanding one of the poles and narrowbanding the other of the poles to improve the gain-versus-frequency characteristic of the amplifier. The input pole compensating capacitance means is a low voltage PN junction capacitor which relocates one of the poles of the amplifier''s transfer function to thereby further improve the gain-versus-frequency characteristic of the amplifier while at the same time minimizing the total monolithic integrated circuit die area required for the fabrication of the input and output pole compensating capacitance means.

FET output drive circuit with parasitic transistor inhibition

Abstract: A CMOS output drive circuit has two field effect transistors (FETs) implemented with a CMOS process and characterized by parasitic bipolar transistors. The back-gates of the two transistors are tied together, such as by forming the devices in a common well, and the back-gate of the second FET is also connected to prevent its associated parasitic bipolar transistor from conducting. Quiescent loads are applied to the two FETs so that their voltages are comparable during low output loading, resulting in a drive circuit with high input impedance and high output voltage swing. The output terminal is taken from the first FET, the voltage of which becomes unbalanced from the second FET at relatively high output loads, turning on the parasitic bipolar transistor for the first FET. This gives the drive circuit a desirably high input impedance and low output impedance for heavy output loads. The circuit thus sacrifices low output impedance for high input impedance and voltage swing during light output loading when output impedance is not very important, and sacrifices high voltage swing for high input impedance and low output impedance at heavy loads at which the impedance levels are more important than voltage swing.

Current mirror utilizing amplifier to match operating voltages of input and output transconductance devices

Abstract: A current mirror utilizes an operational amplifier to provide linear operation over a wide output voltage range. The current mirror includes input transconductance, output transconductance, input cascode and output cascode devices. The operational amplifier has two inputs, one of which is coupled to a node between the output transistors, and the other of which is coupled to a node between the input transistors. The output of the amplifier is used to drive the control terminal of the input cascode device so that the operating voltage of the input transconductance device will be approximately equal to that of the output transconductance device.

Common-gate common-source amplifier

Abstract: Techniques for integrating a common-source and common-gate amplifier topology in a single amplifier design In one aspect, an input voltage is provided to both a common- source amplifier and a common-gate amplifier The output voltages of the common- source amplifier and the common-gate amplifier are provided to a difference block for generating a single-ended voltage proportional to the difference between the output voltages When applied to the design of, eg, low-noise amplifiers (LNA's), the disclosed techniques may offer improved noise performance over the prior art