FET amplifier

About: FET amplifier is a research topic. Over the lifetime, 7048 publications have been published within this topic receiving 77549 citations.

A high efficiency Ka-band monolithic GaAs FET amplifier

Abstract: A monolithic three-stage Ka-band GaAs FET power amplifier has been designed and fabricated on MBE (molecular-beam epitaxy)-grown material with a highly doped (8*10/sup 17/ cm/sup -3/) channel. Devices with gate length of 0.25 mu m and gate width of 50 mu m, 100 mu m, and 250 mu m were cascaded. The gate and drain bias networks were also integrated. A maximum small-signal gain of 26 dB was obtained with 4 V on the drain and 0 V on the gate. When biased for large-signal operation, the amplifier was capable of generating 112 mW output power with 16-dB gain and 21.6% power-added efficiency at 34 GHz. It is believed that this is a record efficiency for a GaAs MMIC (microwave monolithic integrated circuit) amplifier at this frequency. >

Phase stable limiting power amplifier

Abstract: A phase stable limiting power amplifier includes a transistor, having a bias voltage applied to the collector and one applied to the base for operation in a class AB configuration. Input impedance matching circuitry may be coupled to the base with output impedance matching circuitry coupled to the collector. The input and output impedance matching circuitry may include only reactive elements for maximizing amplifier gain. Instability suppression circuitry may be connected between the base and the emitter. Representative functional characteristics for facilitating component selection and selection of operation conditions are provided.

Circuit for shifting and amplifying input voltages

Abstract: A circuit for shifting and amplifying input voltages includes a p-channel enhancement-type FET and an n-channel deep-depletion type FET which are adapted to be alternatingly rendered conductive and nonconductive. A first source of reference potential is connected to the n-channel deep-depletion type FET and a second source of reference potential is connected to the pchannel enhancement-type FET, which sources of reference potential are adapted to be coupled to an output terminal when their respective FETs are rendered conductive. A breakdown voltage device and a second n-channel deep-depletion type FET are provided, according to one embodiment of the invention, and are arranged such that the second FET acts as a current source to break down the breakdown device. The breakdown device thereby properly translates the input voltage, applied at the input of the circuit, to appropriate levels to control the p-channel enhancement-type FET and the first n-channel deep-depletion type FET. According to another embodiment of the invention, another pchannel enhancement-type FET is provided in order to pull up the input voltage.

Neutralized differential amplifiers using mixed-mode S-parameters

Abstract: Distributed amplifiers offer very broadband operation, with the promise of a single all-band wireless solution. However, there are a number of distributed amplifier specific issues that have blocked practical implementation in a portable product. One of these is potential instability exacerbated by 20:1 antenna load impedance variation over a very broad frequency range of interest. This paper provides a neutralized differential amplifier implementation supported by mixed-mode S-parameters technology that offers a broadband stability solution for distributed amplifier application. Measurement results of a single section differential amplifier are included using Motorola's CDR1 BiCMOS technology.

Power amplifier with back-off efficiency

Abstract: A power amplifier system is provided with a signal path including driver stages and output stages. A power control element has one or more control ports and uses one or more nonlinear control characteristics.