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FET amplifier
About: FET amplifier is a research topic. Over the lifetime, 7048 publications have been published within this topic receiving 77549 citations.
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TL;DR: A monolithic SiGe BiCMOS envelope-tracking power amplifier is demonstrated for 802.11g OFDM applications at 2.4 GHz with off-chip digital predistortion employed to improve EVM performance.
Abstract: A monolithic SiGe BiCMOS envelope-tracking power amplifier (PA) is demonstrated for 802.11g OFDM applications at 2.4 GHz. The 4-mm2 die includes a high-efficiency high-precision envelope amplifier and a two-stage SiGe HBT PA for RF amplification. Off-chip digital predistortion is employed to improve EVM performance. The two-stage amplifier exhibits 12-dB gain, <5% EVM, 20-dBm OFDM output power, and an overall efficiency (including the envelope amplifier) of 28%.
232 citations
Patent•
25 Nov 1987
TL;DR: In this article, a sense amplifier for use in a CMOS static random access memory is proposed, which consists of two sensing transistors with their sources coupled to a common pull down node, a pull down transistor for drawing current from the pulldown node during sensing operations, and a four transistor latch coupled to the drains of the two transistors, typically latching in less than two nanoseconds.
Abstract: A sense amplifier for use in a CMOS static random access memory. The core of the sense amplifier comprises seven transistors: two sensing transistors with their sources coupled to a common pull down node, a pull down transistor for drawing current from the pull down node during sensing operations, and a four transistor latch coupled to the drains of the two sensing transistors. The four transistor latch comprises two cross coupled CMOS inverters. When the pull down transistor is activated, the four transistor latch automatically amplifies the voltage differential on the gates of the two sensing transistors, typically latching in less than two nanoseconds. Since the latch is made up of CMOS inverters, no d.c. current is drawn by the sense amplifier after the input data has been sensed and latched. As a result, relatively powerful transistors can be used in the sense amplifier. The use of powerful transistors to produce differential output signals significantly reduces the amount of circuitry needed in the output driver of the memory device incorporating this sense amplifier. Furthermore, this sense amplifier significantly improves the access time of a memory device by enabling sensing with very small input signals from a memory cell, and by reducing the delay between sensing and providing an external data output signal.
215 citations
Patent•
01 Aug 2007
TL;DR: In this article, an impedance matching circuit, coupled with the voltage scaling circuit, the power amplifier, and the low noise amplifier, attenuates the incoming RF signal to a scaled signal within a breakdown voltage of a transistor device in the low-noise amplifier during transmission of the outgoing RF signal.
Abstract: A radio frequency (RF) transmit/receive switch. The transmit/receive switch comprises an impedance matching circuit and a voltage scaling circuit. The impedance matching circuit matches an incoming RF signal to a low noise amplifier and an outgoing RF signal from a power amplifier. The voltage scaling circuit, coupled to the impedance matching circuit, the power amplifier, and the low noise amplifier, attenuates the outgoing RF signal to a scaled signal within a breakdown voltage of a transistor device in the low noise amplifier during transmission of the outgoing RF signal.
211 citations
TL;DR: In this article, a simple model to estimate the effects of light on the dc and RF properties of MESFET'S is presented, where photoconductive and photovoltaic effects in the active channel and substrate are considered to predict the change in the dc equivalent circuit parameters of the FET.
Abstract: Theoretical and experimental work for the performance of GaAs MESFET's under illumination from light of photon energy greater than the bandgap of the semiconductor is described. A simple model to estimate the effects of light on the dc and RF properties of MESFET'S is presented. Photoconductive and photovoltaic effects in the active channel and substrate are considered to predict the change in the dc equivalent circuit parameters of the FET, and from these the new Y- and S-parameters under illumination are calculated. Comparisons with the measured S-parameter's without and under illumination show very close agreement. Optical techniques can he used to control the gain of an FET amplifier and the frequency of an FET oscillator. Experimental results are presented showing that the gain of amplifiers can be varied up to around 20 dB and that the frequency of oscillators can be varied (tuning) around 10 percent when the optical absorbed power in the active region of the FET is varied by a few microwatts. When the laser beam is amplitude-modulated to a frequency close to the free-running FET oscillation frequency, optical injection locking can occur. An analytical expression to estimate the locking range is presented. This shows a fair agreement with the experiments. Some suggestions to improve the optical locking range are presented.
201 citations
TL;DR: In this article, a clamped bit-line current-mode sense amplifier that maintains a low-impedance fixed potential on the bit lines is introduced, which is achieved by relocating the large bitline capacitance to a node within the sense amplifier, with only a minimal effect on the speed of the circuit.
Abstract: A clamped bit-line current-mode sense amplifier that maintains a low-impedance fixed potential on the bit lines is introduced. Using a general model for active-drive memory cells that include the two-transistor (2T) and three-transistor (3T) dynamic cells and the four-transistor/two-resistor (4T-2R) and six-transistor (6T) static cells, the new sense amplifier is shown to have a response speed that is insensitive to bit-line capacitance. This is achieved by relocating the large bit-line capacitance to a node within the sense amplifier that has only a minimal effect on the speed of the circuit. Bit-line clamping also minimizes inter-bit-line voltage noise coupling. >
199 citations