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FET amplifier

About: FET amplifier is a research topic. Over the lifetime, 7048 publications have been published within this topic receiving 77549 citations.


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Patent
07 Apr 2011
TL;DR: In this paper, a semiconductor die with a first n-type channel FET and a second n-channel FET is shown to be electrically coupled to at least one contact area at a first side of the die.
Abstract: One aspect is monolithic semiconductor switches and method for manufacturing. One embodiment provides a semiconductor die with a first n-type channel FET and a second n-type channel FET. A source of the first n-type channel FET and a drain of the second n-type channel FET are electrically coupled to at least one contact area at a first side of the semiconductor die, respectively. A drain of the first n-type channel FET, a gate of the first n-type channel FET, a source of the second n-type channel FET and the gate of the second n-type channel FET are electrically coupled to contact areas at a second side of the semiconductor die opposite to the first side, respectively. The contact areas of the drain of the first n-type channel FET, of the gate of the first n-type channel FET, of the source of the second n-type channel FET and of the gate of the second n-type channel FET are electrically separated from each other, respectively.

58 citations

Patent
Richard Hellberg1
27 Mar 2002
TL;DR: In this article, a composite amplifier (500) based on a main amplifier (510) and an auxiliary amplifier (520), and compensation for non-linear amplifier behavior by means of respective nonlinear models (570, 575) of parasitics.
Abstract: The invention relates to a composite amplifier (500) based on a main amplifier (510) and an auxiliary amplifier (520), and compensation for non-linear amplifier behavior by means of respective non-linear models (570, 575) of parasitics. In order to provide proper excitation of the non-linear models, a filter network (560) based on a linear model of the output network of the composite amplifier is provided. The linear filter network (560) basically determines ideal output node voltages, which are used as input to the respective non-linear models for generating appropriate compensation signals. The compensation signals are finally merged into the input signals of the respective sub-amplifiers (510, 520), thus effectively compensating for the effects of the non-linear parasitics.

57 citations

Patent
03 Apr 1978
TL;DR: In this paper, a complementary metal oxide semiconductor (CMOS) field effect transistor (FET) memory sense amplifier is proposed to detect a relatively small differential voltage that is superimposed on a relatively large common mode precharge signal.
Abstract: A complementary metal oxide semiconductor (CMOS) field effect transistor (FET) memory sense amplifier to detect a relatively small differential voltage that is superimposed on a relatively large common mode precharge signal. The sense amplifier is implemented so as to provide latched output signals after a short time delay and in response to sensed input signals that are supplied via a pair of data bus lines.

57 citations

Patent
24 Jan 2006
TL;DR: In this article, a multi-band radio module for selectively supplying received signals in a plurality of frequency bands to a low noise amplifier via an input impedance matching circuit by switching over the operation mode of the low-noise amplifier is presented.
Abstract: A multi-band radio module for selectively supplying received signals in a plurality of frequency bands to a low noise amplifier via an input impedance matching circuit by switching over the operation mode of the low noise amplifier is comprised of: a pre-stage amplification unit including a plurality of fundamental amplifiers connected to one another in parallel, the fundamental amplifiers sharing a load impedance connected to a source voltage and a grounded degeneration impedance and having input signal lines commonly connected to an input impedance matching circuit; a post-stage amplifier to which the output signals of the plurality of fundamental amplifiers are commonly inputted; and a bias control unit for selectively turning on the fundamental amplifiers, wherein the input impedance of the low noise amplifier is selectively optimized for the matching circuit depending on the RF band to be received.

57 citations

Proceedings ArticleDOI
20 May 2001
TL;DR: In this paper, a 1.4 GHz Doherty amplifier has been implemented using a silicon LDMOSFET and compared with class B and AB amplifiers, respectively, using single-tone, two-tone and forward-link CDMA signals.
Abstract: We have investigated the microwave Doherty amplifier, testing for efficiency and linearity. For the experiment, a 1.4 GHz Doherty amplifier has been implemented using a silicon LDMOSFET. The Doherty amplifier-I (a combination of a class B carrier amplifier and a class C peaking amplifier) and the Doherty amplifier-II (a combination of a class AB carrier amplifier and a class C peaking amplifier) have been compared with class B and AB amplifiers, respectively, using single-tone, two-tone, and forward-link CDMA signals. It demonstrated the superior performance of Doherty amplifiers. The results provide a topology selection guide of the CDMA base station power amplifier to achieve both linearity and efficiency enhancements.

57 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20231
20227
20211
20202
20193
20184