FET amplifier

About: FET amplifier is a research topic. Over the lifetime, 7048 publications have been published within this topic receiving 77549 citations.

Power sensor for RF power amplifier

Abstract: A system for sensing RF amplifier output power includes an amplifier transistor and a sampling transistor that is physically smaller than the amplifier transistor. The sampling transistor is configured to sample the same RF input signal that is amplified by the amplifier transistor. A bias circuit associated with the transistors includes a selection of components based upon operating parameters as well as actual physical sizes of the transistors. The selection of component values in association with transistor sizes is used to enable generation of a current sensing signal that is proportional to the power level of the RF output signal generated by the amplifier transistor.

Power amplifier matching circuit and method using tunable mems devices

Abstract: The present disclosure relates to a power amplifier circuit. In one example, the power amplifier circuit includes a power amplifier coupled to a variable load and a digitally tunable impedance matching network (TMN) positioned between the power amplifier and the variable load. The TMN includes at least one controllable capacitor having a maximum capacitance CT, where the controllable capacitor has a plurality of actuable capacitive elements having differing reactance values ranging from CT*2 0 to CT*2 N , where N=>1.

A handset power amplifier with high efficiency at a low level using load-modulation technique

Abstract: A new monolithic-microwave integrated-circuit power amplifier for cellular handsets has been implemented using the load-modulation concept of the Doherty amplifier, which has a high efficiency at a low power level. In order to get a compact module, the /spl lambda//4 transmission line for the load modulation is replaced by a passive high-pass /spl pi/-network, and the load-modulation circuit is also modified to function as a power-matching circuit of the main amplifier. The amplifier has two modes of operation, low- and high-power modes, controlled by a control voltage. At the high power mode, both the main and auxiliary amplifiers are operational and, at the low power mode, only the main amplifier generates output power enhancing the efficiency. For the code-division multiple-access environment, the amplifier at the low-power mode provides power-added efficiency (PAE) of 39.8% and an adjacent channel power ratio (ACPR) less than 49.8 dBc at 23.1 dBm, and the high-power mode PAE of 37.9% and ACPR of 46.4 dBc at 28 dBm. The efficiency is improved by approximately 18.8% at P/sub out/=23 dBm by the load-modulation technique. For the advanced mobile phone system-mode operation, the amplifier delivers 26.1 dBm with PAE of 53% and 30.8 dBm with 48.7% at the low and high modes, respectively.

FET amplifier with temperature-compensating circuit

Abstract: A FET amplifier which minimizes the worsening of the distortion-susceptibility due to variations in the ambient temperature of operation is to be provided. An LDMOS FET 1 , whose source terminal is grounded and to which are applied a gate voltage Vgs from a gate bias terminal 3 via a temperature-compensating circuit 2 and a choke coil and a drain voltage Vds from a drain bias terminal 4 via a choke coil operates as a source-grounded type amplifier. In the temperature compensating circuit 2 , the resistances of fixed resistance elements 21 and 22 connected in parallel are set to be the same or have the same number of digits, and those of thermosensitive resistance elements (thermistors) 23 and 24 are set to be a combination of a value greater by one digit and a value smaller by one digit than that of the fixed resistance element 21 or the fixed resistance element 22 at the standard level (+25° C.) in the ambient temperature range of operation.