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FET amplifier

About: FET amplifier is a research topic. Over the lifetime, 7048 publications have been published within this topic receiving 77549 citations.


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Patent
26 Jun 2001
TL;DR: In this article, a microcontroller includes a wide band, high gain amplifier on-chip capable of driving a 32 ohm speaker, controllable by the microcontroller processor to either enable or disable the amplifier and switch between multiple modes of power.
Abstract: A microcontroller includes a wide band, high gain amplifier on-chip capable of driving a 32 ohm speaker. The amplifier is controllable by the microcontroller processor to either enable or disable the amplifier and switch between multiple modes of power. In one embodiment, one or more such amplifiers are situated anywhere on the integrated circuit die including at the corners of the die.

46 citations

Journal ArticleDOI
TL;DR: In this paper, the transfer characteristic of relative phase of the third-order intermodulation distortion (IM/sub 3/) of a GaAs FET amplifier is measured and analyzed.
Abstract: The transfer characteristic of relative phase of the third-order intermodulation distortion (IM/sub 3/) of a GaAs FET amplifier is measured and analyzed. The measurement system and method are also described. For drives in the weakly nonlinear region, the measured relative phase of IM/sub 3/ is equal to that of the carrier and is in agreement with the analysis results using Volterra-series representation. For drives in the saturation region, the measured relative phase of IM/sub 3/ versus the input power moves drastically compared with that of the carrier and is in agreement with numerical analysis using discrete Fourier transform. Comparison between measured and analytical results shows the drastic move of IM/sub 3/ relative phase is caused by the generation of IM/sub 3/ due to AM-PM conversion. The measured results and the measurement method are useful for the design and adjustment of predistortion-type linearizers for GaAs FET high-power amplifiers.

46 citations

Patent
Gary John Ballantyne1
04 Aug 1998
TL;DR: In this article, a power amplifier stage can be partially or completely bypassed so that multi-stage amplifiers can be built that allow wide dynamic range of power amplification to be obtained efficiently.
Abstract: A power amplifier circuit arrangement particularly useful for portable phones used in wireless systems. A power amplifier stage can be partially or completely bypassed so that multi-stage amplifiers can be built that allow wide dynamic range of power amplification to be obtained efficiently. A switch at the input of an amplifier stage couples an input signal either to an amplifier or to a bypass path. The output of the amplifier is coupled to a first impedance-transforming network. The bypass path includes a second impedance-transforming network. A third impedance transforming network couples the outputs of the first and second impedance transforming networks. The impedance transforming networks are constructed and arranged so that input and output signals see the correct load regardless of whether the amplifier is used or bypassed. Using the principles of this invention, multi-stage amplifiers can be constructed including input and bypass attenuators to achieve a wide range of gain levels.

46 citations

Patent
Xuejun Zhang1, Jianjun Zhou1
01 Sep 2004
TL;DR: In this paper, a single-stage amplifier with self-biasing and load impedance coupled between the drains of the first and second transistors is presented. But the authors do not consider the effect of the bias currents for the gain transistors.
Abstract: A single-stage amplifier includes (1) first and second “gain” transistors coupled in a common source configuration, (2) first and second resistors providing self-biasing for the first and second transistors, respectively, (3) first and second current sources providing bias currents for the first and second transistors, respectively, and (4) a load impedance coupled between the drains of the first and second transistors The amplifier may further include (5) third and fourth “compensation” transistors coupled in parallel with, and used to compensate parasitic capacitances of, the first and second transistors, respectively, and (6) third and fourth resistors providing self-biasing for the third and fourth transistors, respectively Variable gain may be achieved by varying the bias currents for the gain transistors A two-stage amplifier may be formed with two stages coupled in cascade, with each stage including most or all of the circuit elements of the single-stage amplifier

46 citations

Proceedings ArticleDOI
12 Jun 1989
TL;DR: In this article, three MMICs for microwave applications up to 6 GHz and for digital lightwave applications with data rates up to 5 Gb/s are presented, including an 8-dB gain, 6-GHz half-power loss, fixed-gain wideband amplifier, fabricated in modified discrete transistor process.
Abstract: Three MMICs for microwave applications up to 6 GHz and for digital lightwave applications up to 5 Gb/s are presented. They are: (1) a 8-dB gain, 6-GHz half-power loss, fixed-gain wideband amplifier, fabricated in modified discrete transistor process: (2) a high-gain low-noise (1.6 dB) amplifier that can also be effectively used as a transimpedance amplifier; and (3) a 3-GHz variable-gain amplifier (VGA) with a wide gain control range (50 dB), suitable for 5 Gb/s-data rates in digital lightwave systems. The circuits were fabricated using a nonpolysilicon-emitter silicon bipolar process for transistors with a gain-bandwidth product f/sub T/=10 GHz and maximum oscillation frequency f/sub max/=20 GHz. >

46 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20231
20227
20211
20202
20193
20184