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Showing papers on "Field effect published in 1984"



Journal ArticleDOI
TL;DR: In this article, the authors show that the conventional model for the basic physics of conduction in granular metals is unable to account for low-temperature field effect measurements on discontinuous metal films.
Abstract: The authors show that the conventional model for the basic physics of conduction in granular metals is unable to account for low-temperature field-effect measurements on discontinuous metal films. They discuss the physics of electrical contact between metals and insulators and show that it results in potential disorder that is large in comparison with other relevant energies. They explore the idea of electrostatic relaxation in the insulator and show that it correctly accounts for the small field effect that is observed and for its dependence on temperature and the activation energy for conduction. They have verified the role of electrostatic relaxation by direct experiments in which the relaxation processes are modified with the predicted consequences. They assert that potential disorder must play a dominant role as regards electrical transport in all granular systems.

55 citations


Journal ArticleDOI
TL;DR: In this article, the authors have made extensive capacitance-voltage (C-V) and conductancevoltage measurements as a function of frequency on MIS capacitors fabricated with SiO2 deposited onto Ga0.47In0.53As at low temperature (170°C).

29 citations


Journal ArticleDOI
TL;DR: In this paper, a super-thin polysilicon film on a quartz substrate has been fabricated for flat panel matrix displays and the field effect mobility is more than 20 cm2/Vs at the poly-silicon thickness of 150-200 A. The thickness of the film had an important role in improving the electrical properties.
Abstract: N-channel MOS FET's have been fabricated in super-thin polysilicon film on quartz substrate. The thickness of the film had an important role in improving the electrical properties. Moreover, grain boundary passivation by the hydrogen from a plasma-SiN film has been developed to increase the field effect mobility. The field effect mobility is more than 20 cm2/Vs at the polysilicon thickness of 150–200 A; and threshold voltage and leakage current are reduced to 6 V and 10-13 A/µm, respectively. The device obtained in this work can be used not only for flat panel matrix displays but also for other applications.

23 citations


Journal ArticleDOI
Nobuya Sato1, Hiroshi Mori1, H. Yashima1, Takeo Satoh1, Humihiko Takei1 
TL;DR: In this paper, a single crystal of CeSi 1.86 was obtained and the electrical resistivity and the paramagnetic susceptibility were measured and both quantitities show Fermi-liquid behavior at low temperatures.

19 citations


Patent
09 Nov 1984
TL;DR: In this paper, a very high speed, low power integrated interface circuit using GaAs or InP technology is provided for converting small digital voltage swings to larger swings which are particularly suitable for analog control signals.
Abstract: A very high speed, low power integrated interface circuit using GaAs or InP technology is provided for converting small digital voltage swings to larger swings which are particularly suitable for analog control signals. The preferred embodiments employ solely depletion mode MESFETS and Schottky diodes in Schottky diode field effect logic (SDFL) configurations.

19 citations


Patent
Wolfgang M. Feist1
24 Apr 1984
TL;DR: In this paper, a method for fabricating field effect devices is also disclosed, such method including the step of forming a pair of masking surfaces of insulating material on the surface of the semiconductor.
Abstract: A field effect device having a gate over a portion of a surface of a semiconductor disposed between a source region and a drain region and including a buried doped region having a conductivity type opposite the conductivity type of the semiconductor formed in the semiconductor under, and spaced from such portion of the surface of the semiconductor. The buried doped region is electrically connected to the gate electrode. With such arrangement a field effect device is formed with a connecting channel having a shallow depth in the semiconductor between the gate and the buried doped layer. A method for fabricating field effect devices is also disclosed, such method including the step of forming a pair of masking surfaces of insulating material on the surface of the semiconductor. An ion implantation masking layer is formed between the pair of masking surfaces to enable the selective implantation of particles in the semiconductor to establish the source and drain regions. With such method a single level of masking is used to define the source, drain and gate regions of the device.

17 citations



Journal ArticleDOI
TL;DR: Analyse des parametres d'emission d'une source a effet de champ a Cs liquide soit en mode de champ, soit in mode de ionisation de champ as discussed by the authors, suggerant un processus d'ionization de champ dans chacun des modes
Abstract: Analyse des parametres d'emission d'une source a effet de champ a Cs liquide soit en mode d'emission de champ, soit en mode d'ionisation de champ, suggerant un processus d'ionisation de champ dans chacun des modes

12 citations


Journal ArticleDOI
TL;DR: In this article, it was shown that electron and hole trapping in vitreous quartz occurs when fields larger than 105 V/cm are applied across the insulator of glowdischarge deposited amorphous silicon (a•Si:H) field effect devices.
Abstract: It is shown that electron and hole trapping in vitreous quartz occurs when fields larger than 105 V/cm are applied across the insulator of glow‐discharge deposited amorphous silicon (a‐Si:H) field effect devices. The trapping of charges of both polarities is enhanced by light having energy less than 2 eV. The charge trapping reduces the field effect and the photo‐field‐effect of a‐Si:H at large gate voltages. It is found that strong illumination does not eliminate the effect of accumulation layers on the photoconductivity.

9 citations


Patent
16 Aug 1984
TL;DR: In this article, a MOSFET structure having a biased gate covered with an insulator of such a thickness as to render the structure capable of giving a measure of accumulated charge and usable in a stacked structure as a particle spectrometer.
Abstract: A MOSFET structure having a biased gate covered with an insulator of such a thickness as to render the structure capable of giving a measure of accumulated charge and usable in a stacked structure as a particle spectrometer.

Journal ArticleDOI
TL;DR: In this article, the noise near 4 MHz of a cryogenically cooled GaAs metal semiconductor field effect transitor (MESFET) has been measured, and the input noise current is iN=1.1±0.2×10−14 A/(Hz)1/2 and the additive voltage noise is eN= 1.2± 0.4× 10−9 V/(Hz), which gives a noise temperature TN=0.5 K.
Abstract: The noise near 4 MHz of a cryogenically cooled GaAs metal semiconductor field effect transitor (MESFET) has been measured. The input noise current is iN=1.1±0.2×10−14 A/(Hz)1/2 and the additive voltage noise is eN=1.2±0.4×10−9 V/(Hz)1/2 , which gives a noise temperature TN=0.5 K.

Journal ArticleDOI
TL;DR: In this paper, the field effect mobility on the free surface of PbTe films grown by hot wall epitaxy (HWE) technique ona KCl substrate was studied as a function of frequency in the range 40-200 kHz at different temperatures from 98-156 K.
Abstract: The field effect mobility on the free surface of PbTe films grown by hot wall epitaxy (HWE) technique ona KCl substrate was studied as a function of frequency in the range 40–200 kHz at different temperatures from 98–156 K. Using Garrett's theory of the frequency dependence of field-effect mobility, the relaxation times of surface states were found to vary from 1.84 to 0.96 μsec in the above temperature range. From Rupprecht's relation on temperature dependence of relaxation times, the energy level of surface states was found to be 0.02 eV below the conduction band with an effective capture cross section of the order 10−19 cm2.

Journal ArticleDOI
TL;DR: In this article, the effects of interface properties on the performance of thin-film transistors are examined theoretically and the static characteristics, e.g., the off conductance and the on-off ratio, and the dynamic response represented by the fraction of induced charge that is free, are considered.
Abstract: The effects of interface properties on the performance of thin‐film transistors are examined theoretically. The static characteristics, e.g., the off conductance and the on‐off ratio, and the dynamic response represented by the fraction of induced charge that is free, are considered. The interfaces, both at the gate side and the substrate side, are specified by the interface charge transfer (at equilibrium) from the semiconductor to the insulator, as well as the more familiar density of interface states. The properties of the two interfaces are found to control different regimes (high field and low field) of field‐effect conductance. Thus, by a careful tailoring of the two interfaces, and/or the two insulator materials, the transistor characteristics can be optimized.


Patent
30 Jul 1984
TL;DR: In this paper, a reverse conductivity type diffused layer conneting a wiring to an external lead-out electrode and supplying a substrate potential are provided on the oneconductivity type semiconductor substrate.
Abstract: PURPOSE:To enable to reduce a resistance component inserted to a protection diode in series by a method wherein a reverse conductivity type diffused layer conneting a wiring to an external lead-out electrode and an electrode connected to one conductivity type substrate, through a field oxide film on the surface of the semiconductor in the neighborhood of the diffused layer, and supplying a substrate potential are provided on the one conductivity type semiconductor substrate. CONSTITUTION:The poly Si wiring 10 which is provided, via an insulation gate oxide film, on the source and drain region 12 of an N-channel Si gate MOSFET, and constitutes a gate electrode 11 is connected to an input terminal 13 by means of an N type diffused layer 14. In the neighborhood of this N type diffused layer 14, an aluminum potential wiring for a substrate potential 18 which penetrates through a field oxide film 16 and becomes in ohmic contact with a P type high concentration layer 17 formed on the surface of the P type semiconductor substrate 15 is formed. In an MOS semiconductor device formed in such a manner, when impressed by an overcurrent 13, the current flowing through a protection diode formed of the N type diffused layer 14 and the P type semiconductor substrate 15 flows from the surface of the substrate 15 to the electrode wiring 18 as shown by an arrow mark 19.

Patent
16 May 1984
TL;DR: In this paper, an electric field is impressed on a semi-metallic thin layer generated in the neighborhood of an interface by the combination of a Semi-Metallic layer of Bi, etc. or a suitable semiconductor film via a hetero junction of an insulation film or a semiconductor, and thus controlling the semimetallic layer.
Abstract: PURPOSE:To obtain a high speed FET by a method wherein an electric field is impressed, on a semi-metallic thin layer generated in the neighborhood of an interface by the combination of a semi-metallic layer of Bi, etc. or a suitable semiconductor film, via a hetero junction of an insulation film or a semiconductor, and thus controlling the semi-metallic layer. CONSTITUTION:The Bi 12 approx. 80nm thick is adhered on an N type Si substrate 11 of 0.1OMEGAcm. The layer 12 is a semi-metallic layer which has electrons and holes at 2X10 cm and has a large value of approx. 8X10 cm /V second in electron mobility at an extremely low temperature (4.2 deg.K). An Al2O3 13 of 50nm is superposed on the Bi 12, and a gate, a source, and a drain electrode 14-16 are laid by Au of 1,000nm. The concentration of electrons and holes in the film 12 is changed by impressing an electric field on the Bi film 12 in the direction of width. The conductivity at an extremely low temperature is decided only by the electrons, the conductance varies rapidly, and then the FET of superhigh speed actions can be obtained. The thin layer of semi-metallic properties can be obtained also at the interface of InAg-GaSb, and accordingly the FET of likewise high speed actions can be formed.

Journal ArticleDOI
Frank Jansen1, Joseph Mort1, Steven J. Grammatica1, Michael A. Morgan1, I. Chen1 
TL;DR: The imaging properties of photoreceptor structures based on amorphous silicon are discussed in this article, where the external surface of such structure is an electrically insulating film, it functions during the imaging process like the gate insulator in a thin film transistor.
Abstract: The imaging properties of photoreceptor structures based on amorphous silicon are discussed. When the external surface of such structure is an electrically insulating film, it functions during the imaging process like the gate insulator in a thin film transistor. The resulting field effect phenomena are shown to decrease the attainable electrophotographic resolution. Methods are discussed to counteract the occurence of the field effect in photoreceptors made of tetrahedrally bonded amorphous materials.

Journal ArticleDOI
TL;DR: In this paper, the effect of field effect on metal insulator-semiconductor structures of p•CuInTe2 thin films grown on mica is studied and an increase in carrier density and a decrease in the mobility is observed on the application of a negative gate field.
Abstract: Field effect studies on metal‐insulator‐semiconductor structures of p‐CuInTe2 thin films grown on mica are made in the temperature range 77–295 K. An increase in carrier density and a decrease in the mobility is observed on the application of a negative gate field. The effect of a positive gate field is the opposite. The Hall coefficient is found to remain practically constant at a lower temperature range (77–180 K) and then decreases with a further rise of temperature. The study of the effective field effect mobility μFE reveals that the surface states charge scattering mechanism dominates the scattering process.

Journal ArticleDOI
TL;DR: The electric and electrostatic properties of polymers with negligible intrinsic charge carrier concentration are determined by the ratio of injection of excess charge carriers, e.g. from a metal electrode, to the rate of charge transport as discussed by the authors.
Abstract: The electric and electrostatic properties of polymers with negligible intrinsic charge carrier concentration are determined by the ratio of injection of excess charge carriers, e.g. from a metal electrode, to the rate of charge transport. Both, injection and transport of charge carriers are affected by polymer specific interface parameters, e.g. energy level of the polymer band gap states, barrier heights between these levels, band bending situations, orientation and dipole relaxation in the bulk near the surface, as well as experimental parameters like work function of the contacting metal, contact ratio and contact frequency. The resulting space charge and dipole orientation distribution near polymer metal interfaces, which is concentrated within a region smaller than 1 ?m near the polymer surface, is measured experimentally and calculated by simple model assumptions. Experimental results of two different experimental techniques which are intermittent contact electrification and electrical field effect are compared and commonly discussed under these viewpoints.

Patent
16 Nov 1984
TL;DR: In this article, a crossing pattern of a common electrode 3 and segment electrodes 4' is formed to reduce the influence of lines of electric force at edge parts of a dotted pattern, preventing the orientation inversion during the electric field application of liquid crystal molecules.
Abstract: PURPOSE:To prevent orientation inversion during electric field application and eliminate the need for special electric signal processing by devising an electrode shape. CONSTITUTION:A crossing pattern of a common electrode 3 and segment electrodes 4' is formed. Cut parts 7 are formed in the electrodes 4' to reduce the influence of lines of electric force at edge parts of a dotted pattern, preventing the orientation inversion during the electric field application of liquid crystal molecules. When dimensions (a), (b), (c), and (d) are about 30, 120, 300, and 350mum, excellent display quality is obtained. The cut parts 7 are only provided where the orientation inversion of liquid crystal occurs at end parts of intersections of the electrode 3 and 4'. Therefore, the cut parts 7 are different in arrangement position when the direction of a normal visual angle area is different.

Patent
Benjamin Kazan1
07 Jun 1984
TL;DR: In this article, an imagewise pattern of conductivity is formed in a semiconductor material by exposing the material to an intense radio-frequency field causing generation of heat in the conductive areas.
Abstract: To form an optical image, an imagewise pattern of conductivity is formed in a semiconductor material. Exposing the material to an intense radio-frequency field causes generation of heat in the conductive areas. The semiconductor is made of a heat-sensitive material or includes a heat-sensitive material. The heat-sensitive material responds to heat by physical changes which can be optically detected. Preferably the semiconductor is a photoconductor with surface charge capability retention which allows formation of a conductivity pattern by normal xerographic processes.

Journal ArticleDOI
TL;DR: In this article, the true dc measurement of electrical field effect on the resistivity of orthorhombic TaS 3 in the CDW state was performed for the first time with extremely short distances between the contacting leads.
Abstract: The true dc measurement of electrical field effect on the resistivity of orthorhombic TaS 3 in the CDW state was performed for the first time with extremely short distances between the contacting leads. Very weak nonlinear effect was observed up to 1300 V/cm. A distinct resistivity-increasing effect was found, which can not be understood within the framework of any currently available theories. We propose a transverse tunneling model to account for this anomaly.

Patent
25 Aug 1984
TL;DR: In this paper, the authors proposed a method to improve the write efficiency of an FPROM and increase the withstand voltage by a method wherein a semiconductor layer of a low impurity concentration and that of a high one are provided on the same semiconductor substrate, and a memory transistor is formed at the region of high impurate concentration, and the other transistor at the regions of low one.
Abstract: PURPOSE:To improve the write efficiency of an FPROM and contrive to increase the withstand voltage by a method wherein a semiconductor layer of a low impurity concentration and that of a high one are provided on the same semiconductor substrate, and a memory transistor is formed at the region of a high impurity concentration, and the other transistor at the region of a low one. CONSTITUTION:A semiconductor single crystal growth layer 24 of a low impurity concentration of the same conductivity type is formed on the semiconductor substrate 23 of a high impurity concentration of one conductivity type, and, in the grown layer 24, the region 25 of the same conductivity type and higher impurity concentration than that of said layer 24 which reaches from the main surface of said layer 24 to the substrate 33 is formed. The EPROM memory transistor 21 is formed in the region 25, and the peripheral circuit transistor 22 is formed in the grown layer 24. Therefore, the write efficiency is improved, and the source-drain withstand voltage can be increased by forming the memory transistor at the region of a high impurity concentration.

Patent
20 Nov 1984
TL;DR: In this paper, the authors proposed a method to eliminate the effect affected to the potential in a measured solution by the potential of a substrate, source, drain and the like by a method wherein the surface of an FET sensor is covered with a semiconductor layer except a channel region and the semiconductor is biased at a suitable potential.
Abstract: PURPOSE:To eliminate the effect affected to the potential in a measured solution by the potential of a substrate, source, drain and the like by a method wherein the surface of an FET sensor is covered with a semiconductor layer except a channel region and the semiconductor layer is biased at a suitable potential. CONSTITUTION:When an FET sensor is used as a PH sensor, the surface of its nitride film 15 is dipped in a solution 20 to be measured. An electrical double layer is produced between the surface of the nitride film. A current which flows between a source 12 and a drain 13 is modulated by a potential produced by the electrical double layer and this modulated current is measured to obtain the PH value of the measured solution 20. The surface of the FET sensor is covered with a semiconductor layer 31 except a gate layer and electrical contact metals 17. A potential is given to the semiconductor layer 31 by a terminal 32. As a substrate 11, the source 12 and the drain 13 are shielded by the semiconductor layer 31, their potential has almost no effect to the potential in the measured solution. It is preferrable to make the potential of the semiconductor layer 31 and the potential of a comparing electrode 26 nearly equal with each other.

Journal ArticleDOI
TL;DR: In this article, the authors developed a new theory to describe the current-voltage characteristics of amorphous silicon based alloy field effect transistors and showed that the transition from below to above threshold operation occurs when the Fermi level in the accumulation region moves from the deep to tail localized states in the energy gap.
Abstract: We have developed a new theory to describe the current-voltage characteristics of amorphous silicon based alloy field effect transistors. We show that the transition from below to above threshold operation occurs when the Fermi level in the accumulation region moves from the deep to tail localized states in the energy gap and that the field effect mobility is dependent on gate voltage. We also propose a new technique to determine the flat-band voltage from the I-V characteristics in the below threshold regime.

Journal ArticleDOI
TL;DR: In this paper, an attempt has been made to reproduce the experimentally observed magnetic order parameter of a planar ferromagnet (Rb 2 CrCl 4 ) with a suitable choice of crystal field and exchange parameters.
Abstract: Correlated effective field theory which includes fluctuations semiempirically has been used here to study the crystal field effect on the magnetic behaviour in planar ferromagnets. An attempt has been made to reproduce the experimentally observed magnetic order parameter of a planar ferromagnet (Rb 2 CrCl 4 ) with a suitable choice of crystal field and exchange parameters. An alternative model Hamiltonian with anisotropic exchange and no crystal field effect has been considered to reproduce the same experimental results. Both calculations have been compared with the standard RPA results and the existing theoretical results.

Book ChapterDOI
01 Jan 1984
TL;DR: The first gallium arsenide field effect transistors were fabricated over 15 years ago and major programs worldwide have enabled the device to be developed into a commercial production item opening up many new applications areas both in low-noise receivers and in transmitting circuitry.
Abstract: It is now over 15 years ago that the first gallium arsenide field effect transistors were fabricated. Since then major programs worldwide have enabled the device to be developed into a commercial production item opening up many new applications areas both in low-noise receivers and in transmitting circuitry.

Patent
15 Nov 1984
TL;DR: In this paper, the amplitude of a superhigh frequency electrical signal in a super high frequency active circuit was controlled by means of the intensity or wavelength of a light incident to a field effect transistor (TR) made of photo semiconductor material.
Abstract: PURPOSE:To simplify the entire circuit constitution and to decrease the power consumption by controlling directly the amplitude of a superhigh frequency electrical signal of a superhigh frequency active circuit by means of the intensity or wavelength of light CONSTITUTION:Let a field effect transistor (TR) 11 made of a photo semiconductor material, eg GaAs be a semiconductor active element constituting a superhigh frequency active circuit 4, eg, a superhigh frequency amplifier Further, when a light L is made incident to the field effect TR11, an electrical signal taking a level in response to the intensity or wavelengh of the light L is led out from the field effect TR11 and the superhigh frequency electrical signal having the amplitude controlled by the light L is obtained

Journal ArticleDOI
TL;DR: In this paper, an attempt was made to control the electrical conductivity of n-type silicon by utilizing the anisotropic character of hot electrons The I-V characteristics were measured in the presence of electric fields at 77 K.
Abstract: An attempt was made to control the electrical conductivity of n-type silicon by utilizing the anisotropic character of hot electrons The I –V characteristics were measured in the presence of electric fields at 77 K The roles of the intervalley redistribution and the intravalley scattering of hot electrons in the observed results are discussed on the basis of an expression for the mobility in the direction