Showing papers on "Field effect published in 1986"
Patent•
17 Apr 1986TL;DR: In this paper, a semiconductor device including a field effect transistor of the D-MOS type which is composed of substructures and in which further surface zones are provided in the intermediate spaced between the regularly arranged substructure in order to improve the field distribution in the semiconductor body, as a result of which the breakdown voltage of the transistor is increased.
Abstract: A semiconductor device including a field effect transistor of the D-MOS type which is composed of substructures and in which further surface zones are provided in the intermediate spaced between the regularly arranged substructures in order to improve the field distribution in the semiconductor body, as a result of which the breakdown voltage of the transistor is increased. The further surface zones can be provided without additional processing steps being required and need not be contacted at the main surface.
59 citations
TL;DR: In this paper, a self-consistent analysis of the density of gap states profile is presented, where the Meyer-Neldel (MN) rule is properly considered in relation to the nonuniform shift of the Fermi level as induced by the field effect.
Abstract: We calculated a more accurate density of states (DOS) profile from field‐effect (FE) measurements in hydrogenated amorphous silicon thin‐film transistors, taking into account the anomalously changing conductivity prefactor in accordance with the Meyer–Neldel (MN) rule. We present a self‐consistent analysis of the density of gap states profile, where the MN rule is, for the first time, properly considered in relation to the nonuniform shift of the Fermi level as induced by the field effect. Moreover, the calculation yields the correct flat‐band voltage and the corresponding flat‐band activation energy. The determination of conductivity activation energies free from any initial band bending effects is of importance in all types of transport measurements.
42 citations
TL;DR: In this paper, the photo field effect in amorphous silicon thin-film transistors has been studied and it has been shown that illumination always produces a change in the band bending and a consequent redistribution of the space charge.
Abstract: Amorphous silicon thin‐film transistors show a marked photosensitivity, with the illumination producing an increase in the off‐current and a negative shift of the threshold voltage. Here we present the results of a complete theory of this photo‐field effect, which includes the steady state flux of electrons and holes perpendicular to the source‐drain current path. We show that illumination always produces a change in the band bending and a consequent redistribution of the space charge. The theory gives an excellent agreement with the experimental results using a simple model for the density of states in the amorphous silicon.
36 citations
TL;DR: In this paper, a theoretical analysis of an electret air-gap field effect transistor with a movable gate is given for a solid state microphone and a pressure sensor, and a well-considered decision can be made as to which configuration is best suited for a specific application.
36 citations
TL;DR: Physical processes which govern the switching speed of heterostructure field-effect transistors, including high-electron mobility transistors as discussed by the authors, are discussed to show that the ultimate switching speed is of the order of one ps.
Abstract: Physical processes which govern the switching speed of heterostructure field-effect transistors, including high-electron mobility transistors, are discussed to show that the ultimate switching speed is of the order of one ps The importance of adopting new FET structures with higher current-drive capability is pointed out, including selectively-doped double-hetero structures and material systems other than GaAs-AlGaAs Possibilities of novel field-effect devices, such as velocity modulation transistors, quantum-well-wire FET's with extremely high electron mobilities, and field-effect 2-dimensional-electron-gas superlattices are also discussed The concept of wavefunction engineering in these devices is described
25 citations
Patent•
24 Oct 1986TL;DR: In this article, a method of merging bipolar and field effect transistors on a semiconductor substrate by forming a diffused buried DUF collector region of a second conductivity type in the substrate, and growing an impurity doped epitaxial layer of silicon of the secondconductivity type over the substrate was proposed.
Abstract: A method of making a merged bipolar and field effect semiconductor transistors on a semiconductor substrate by forming a diffused buried DUF collector region of a second conductivity type in the substrate, and growing an impurity doped epitaxial layer of silicon of the second conductivity type over the substrate. Once the epitaxial layer is grown, a plurality of isolation regions are formed in this layer. A bipolar transistor is formed over the DUF region in a bipolar isolation region and a field effect transistor formed in the second isolation region. Contacts and interconnects are deposited and patterned.
21 citations
Patent•
27 Feb 1986TL;DR: A field effect semiconductor device which utilizes a two-dimensional electron gas is composed of a semi-insulating substrate (1 an i-type active layer (2), a superlattice structure layer which comprises a first I-type thin layer (3A), a thin layer doped with dopant by an atomic plane doping process, and a second i type thin layer(3C), these thin layers forming a quantum well; generally an n-type layer; and electrodes (6, 7, 8) for source, drain, and gate as discussed by the authors.
Abstract: A field effect semiconductor device which utilizes a two-dimensional electron gas is composed of a semi-insulating substrate (1 an i-type active layer (2); a superlattice structure layer which comprises a first i-type thin layer (3A), a thin layer (3B) doped with dopant by an atomic plane doping process, and a second i-type thin layer (3C), these thin layers forming a quantum well; generally an n-type layer; and electrodes (6, 7, 8) for source, drain, and gate
20 citations
Patent•
22 Sep 1986
TL;DR: In this paper, a vertical field effect transistor operating under ballistic conditions at very high frequencies (100-200 GHz) was proposed to increase the output impedance of this transistor, as well as its power, by decoupling the first gate from the drain by the field effect of a second gate.
Abstract: The invention relates to a vertical field effect transistor operating under ballistic conditions at very high frequencies (100-200 GHz). In order to increase the output impedance of this transistor, as well as its power, the field effect of the first gate is decoupled from the drain by the field effect of a second gate. The two gates are carried by two opposite sides of a mesa etched in the active layer beneath the drain. The second gate is displaced with respect to the first gate and is closer to the drain. The displacement is obtained by an insulating layer beneath the second gate. The two gates are successively deposited by lateral projections. Application to ultra-high frequency systems.
14 citations
Patent•
27 Nov 1986TL;DR: In this article, a bias potential that forms an electrical field within the device exceeding a predetermined field strength is defined. But the bias potential is defined as the portion of the dipole electrical field including and exceeding the predetermined value.
Abstract: A field effect device transistor geometry and method of fabrication are described. The FET may be operated from a bias potential that forms an electrical field within the device exceeding a predetermined field strength. The device comprises a semiconductor substrate portion of a first conductivity type, said substrate portion having a major surface, and a region of a second conductivity type adjacent the major surface and adapted to receive the predetermined bias potential, the region including a subregion of like conductivity type and lesser conductivity, the subregion being positioned within the region such that the subregion receives at least that portion of the dipole electrical field including and exceeding the predetermined value.
13 citations
TL;DR: The electrostatic interaction of the double layer field with optically absorbing admolecules can cause modulation reflectance spectra owing to the Stark effect and the dissociation field effect, respectively as discussed by the authors.
6 citations
Patent•
03 Sep 1986
TL;DR: In this article, the authors proposed a method to improve the uniformity of a threshold value, by a method wherein semiconductor layers of an ohmic side and a channel side are made different and a depletion type SISFET is realized by applying the difference between work functions of the layers.
Abstract: PURPOSE:To improve the uniformity of a threshold value, by a method wherein semiconductor layers of an ohmic side and a channel side are made different and a depletion type SISFET is realized by applying the difference between work functions of the layers. CONSTITUTION:The figure shows a magnified feature of the energy band of an ohmic gate part formed in the manner in which a semiconductor layer 3 of small electronic affinity is used for the semiconductor layer of the ohmic gate, and the difference between work functions of channels interposing an insulation semiconductor layer 2 of (t) thick and a semiconductor layer 1 is made large. The energy bands of boundary parts are adjusted in the manner in which Fermi levels EF of the respective semiconductor layers 1-3 coincide with each other in a thermal equilibrium state, and the work functions at junctions are made continuous to keep the equilibrium state. The work function phi3 of the semiconductor layer 3 is sufficiently smaller than the work function phi1 of the semiconductor layer 1, and two-dimensional electrons 2DEG are generated. When the discontinuous energy difference of the conduction band at the ohmic gate side is about 0.3eV smaller than the semiconductor layer side of the channel, a desired depletion type SISFET is obtained.
Patent•
23 Jul 1986
TL;DR: In this article, the authors propose to derease the rise or fall time of output by giving a portion of a conductor located below a field effect transistor a potential equal or close to a potential that is given to its gate electrode to turn on the field effect transistors.
Abstract: PURPOSE:To derease the rise or fall time of output, by giving to a portion of a conductor located below a field effect transistor a potential equal or close to a potential that is given to its gate electrode to turn on the field effect transistor CONSTITUTION:A P-channel MOSFETMp is arranged over a semiconductor substrate 1p kept at a 'low' level Vl, similarly to conventional field effect semiconductor devices, while an N-channel MOSFETMn is arranged over a semiconductor well 2n kept at a 'high' level Vh Accordingly, when a gate voltage Vg is raised from the 'low' level to the 'high' level, there is no difference in potential between a gate electrode 7 and the semiconductor well 2n below a channel 6 Thus, no electric field is created in the channel 6 in the direction perpendicular thereto In this manner, a delay (tn) in fall of an output voltage Vo can be made substantially as small as the delay (tp) in the rise thereof
Patent•
17 Jul 1986
TL;DR: In this paper, the authors proposed a method to lessen continuous light irradiation effect at low temperature, by a method wherein in a high electron or hole mobility transistor, donor or acceptor impurities are doped to a heterojunction surface of a super lattice layer which becomes a channel.
Abstract: PURPOSE:To lessen continuous light irradiation effect at low temperature, by a method wherein in a high electron or hole mobility transistor, donor or acceptor impurities are doped to a heterojunction surface of a super lattice layer which becomes a channel, and carriers are supplied from that donor or acceptor impurities. CONSTITUTION:An non-dope (high purity) GaAs layer 11 and GaAs layer/AlAs super lattice layers 12 are formed continuously on a semi-insulating GaAs substrate 10 by the molecular crystal growth method the same as ordinally high electron mobility transistor. This lattice layer 12 are composed of an non-dope GaAs layer 14 and an non-dope GaAs layer 15, and the doping of Si is performed to the hetero field surface of the GaAs layer 14 and AlAs layer 15 by the atomic planar doping. Furthermore, an n GaAs layer 21 for contact is formed, and a source electrode 22 a drain electrode 23 are formed by alloying AuGa/Au, and a gate electrode 13 is formed with Al or Ti-Pt-Au.
01 Jul 1986
TL;DR: In this paper, the authors proposed a fabrication process used to study effects of size reduction in MOS devices and eventually to build practical threedimensional structures, which results in gate-channel lengths of only few hundred angstroms about 100 times as small as state-of-theart devices.
Abstract: Process for making metal-oxide/semiconductor field-effect transistors (MOSFET's) results in gate-channel lengths of only few hundred angstroms about 100 times as small as state-of-the-art devices. Gates must be shortened to develop faster MOSFET's; proposed fabrication process used to study effects of size reduction in MOS devices and eventually to build practical threedimensional structures.
TL;DR: In this paper, the electric field effect in polycrystalline metallic films is considered in terms of size effects and the scattering of conduction electrons at asperities on the external surfaces and at the grain boundaries are taken into account.
TL;DR: Using the supersymmetric formalism of Brezin, Gross and Itzykson as mentioned in this paper, the Hall conductivity of a two-dimensional electron gas, in the presence of a strong magnetic field and impurities, resulting from a very weak static electric field, was found to be not quantised, in contrast to what is expected for the conductivity obtained from an electric field.
Patent•
14 Jun 1986
TL;DR: A photoconductor comprising an optically sensitive field-effect transistor and including an appropriately biassed insulated metal gate for gain enhancement is proposed in this paper, where the slow carriers are attracted to the semiconductor/ insulator interface where the longitudinal field is smaller and thus their transit time, and the gain, is increased.
Abstract: A photoconductor comprising an optically sensitive field-effect transistor and including an appropriately biassed insulated metal gate (5, 6) for gain enhancement. The slow carriers are thus attracted to the semiconductor/ insulator interface where the longitudinal field is smaller and thus their transit time, and the gain, is increased. The AC-earthed gate contact (Schottky contact) (7) can be used to extract the slow carriers noiselessly after their transit if required. By providing a heterojunction at the gate contact (Fig. 2) any deleterious influence of the insulator interface states can be reduced.
TL;DR: In this article, selective ohmic contacts were made to double two-dimensional electron gas (2DEG) layers spatially separated by 1000 mm in a GaAs?AlGaAs quantum well heterostructure.
Abstract: Selective ohmic-contacts were made to double two-dimensional electron gas (2DEG) layers spatially separated by 1000 ? in a GaAs?AlGaAs quantum well heterostructure. A HEMT-type device was fabricated by utilizing a surfaceside 2DEG layer as an active channel and substrate-side 2DEG as a backside gate conductor. The transconductance increased by 50% with an applied back-gate bias as low as 1 V. This bias is about three orders of magnitude lower than any previously reported back-gated HEMT structures. Hot-electron transfer between the two 2DEG layers, induced by the applied electric field, was also observed.
Patent•
04 Nov 1986
TL;DR: In this article, the reverse recovery time of a parasitic diode equivalently coupled between source and drain of a power MOSFET and to enable it to operate at a high speed, by diffusing and introducing platinum from the semiconductor substrate under such heat treatment conditions that it reaches the bottom of a channel region.
Abstract: PURPOSE:To decrease substantially the reverse recovery time of a parasitic diode equivalently coupled between source and drain of a power MOSFET and to enable it to operate at a high speed, by diffusing and introducing platinum from the semiconductor substrate under such heat treatment conditions that it reaches the bottom of a channel region. CONSTITUTION:On the rear face of a power MOSFET in which all the predetermined diffusions have been completed, there is provided a 500 Angstrom thick thin platinum film by means of the vacuum vapor deposition. After that, the platinum is diffused in the atmosphere of nitrogen to provide a platinum diffused lowconcentration drain region 11 and a platinum diffused P-type region 12 in which a channel is to be formed, Thus, by diffusing and introducing platinum in the part of a parasitic diode 9 between the source and the drain, minority carriers residual in the diode can be diminished quickly by the lifetime killer effect of the platinum when forward current of the diode is blocked. Accordingly, the reverse recovery time of the diode can be decreased.
Patent•
27 Oct 1986TL;DR: In this article, a method of making an integration of bipolar and field effect semiconductor transistors on a semiconductor substrate by forming a diffused buried DUF collector region of a second conductivity type in the substrate, and growing an impurity doped epitaxial layer of silicon of the second conductivities type over the substrate is described.
Abstract: A method of making an integration of bipolar and field effect semiconductor transistors on a semiconductor substrate by forming a diffused buried DUF collector region of a second conductivity type in the substrate, and growing an impurity doped epitaxial layer of silicon of the second conductivity type over the substrate. Once the epitaxial layer is grown, a plurality of isolation regions are formed in this layer. A bipolar transistor is formed over the DUF region in a bipolar isolation region and a field effect transistor formed in the second isolation region. Contacts including silicide and interconnects are deposited and patterned.
TL;DR: In this paper, the magnetic properties of the degenerate Anderson model at low temperatures were investigated in the presence of the crystalline field. And the magnetization, the magnetoresistance and the linear coefficient of the specific heat were calculated as a function of the magnetic field in the mixed valence regime for the case of the cubic field.
TL;DR: In this paper, the total polarization required in the Lorentz model has been given by the sum of the two components, and a new equation for the absolute band intensity corrected for the internal field effect was proposed.
Abstract: The Lorentz internal field model has been widely used in order to correct the observed infrared spectra for the effect of the internal electric field. In all previous papers, the total polarization required in the Lorentz model has been considered to have only one component. In this paper, however, another component was introduced, and the total polarization was given by the sum of the two components. Such a change in the Lorentz model led to a new equation for the absolute band intensity corrected for the internal field effect.
Patent•
27 Dec 1986
TL;DR: In this paper, a carrier is confined in a narrow-gapped one conductive type channel layer and a Schottky barrier is raised by forming a camel type Schottkey junction on the surface of the channel layer.
Abstract: PURPOSE:To obtain the title semiconductor device which can be operated at high speed with a high rate of gain and having no substrate shifting in threshold voltage when the device is brought in the state of short channel and also having no possibility of deterioration of K-value and the like by a method wherein a carrier is confined in a narrow-gapped one conductive type channel layer CONSTITUTION:An N-type channel layer 5 is formed with InGaAs having a narrow band gap when compared with a semi-insulating GaAs substrate, and also a P-type impurity introducing layer 6, with which a Schottky barrier is raised by forming a camel type Schottky junction, is formed on the surface of the above-mentioned channel layer 5 As the band gap of InGaAs is narrow when compared with InGaAs, the possibility of the electrons running between and N type GaAs source region 9 and an N type GaAs drain region 10 and passes the side of the substrate 1, can be eliminated
Patent•
25 Aug 1986
TL;DR: In this article, a PIN structure is constructed on an N-type InP substrate by alternating superposing undoped InGaAs layers 75Angstrom 10, which lattice-match with InP, and undoped INAlAs layer 5 to which Be is doped as a P-type impurity, thus forming the so-called PIN structure.
Abstract: PURPOSE:To obtain single axial mode beams stably and simply by modulating the transmission characteristics of beams by utilizing the longitudinal electric- field effect of a quantum well layer. CONSTITUTION:A multiple quantum well active layer 3 in thickness of 0.9mum is grown on an N-type InP substrate 1, to which Sn is doped, by alternately superposing undoped InGaAs layers 75Angstrom 10, which lattice-match with InP, and undoped InAlAs layers 75Angstrom 11 at sixty periods in total, and a P-InP layer 5 to which Be is doped as a P-type impurity is grown on the layer 3, thus forming the so-called PIN structure. A Be-doped InGaAs layer 8 is grown on the layer 5 in succession, and a hole having a diameter of 0.5mm is bored to the layer 8 and a P side electrode Au:Zn:Ni 21. Accordingly, a field effect extraordinarily larger than the normal bulk structure is acquired.
04 Mar 1986
TL;DR: In this paper, the generalized dual field effect on the response times of liquid crystals has been analyzed and demonstrated experimentally by using both static magnetic and pulsed optical fields, and an improvement in decay time higher than one order of magnitude, depending on the field strength can be achieved.
Abstract: The generalized dual field effect on the response times of liquid crystals has been analyzed and demonstrated experimentally by using both static magnetic and pulsed optical fields. An improvement in decay time higher than one order of magnitude, depending on the field strength, can be achieved. At high fields, this relaxation time is inversely proportional to the external field intensity and is independent of the liquid crystal thickness. In addition, thermal modulation of liquid crystals was investigated. The response times of the opto-optical thermal modulation are found to be much faster than the corresponding electro-optic modulation of liquid crystals.
Patent•
04 Feb 1986
TL;DR: In this paper, an improved process for the MOS and CMOS transistors formed in an epitaxial layer type is presented. But the transistors are fabricated in the recrystallized silicon layer.
Abstract: An improved process for the MOS and CMOS transistors formed in an epitaxial layer type. Forming of field oxide regions 14a, followed by the deposition of a polysilicon layer or amorphous 20a which comes into contact with the substrate 10 at "germination windows" 24 formed between the field oxide regions . The silicon layer is recrystallized from the substrate through the nucleation windows. The transistors are fabricated in the recrystallized silicon layer. (CF DRAWING IN BOPI)
Patent•
28 Feb 1986
Patent•
01 Aug 1986
TL;DR: A TRANSISTOR REVERSE FIELD as mentioned in this paper was built in a TITANIUM way to provide a transistor field that is suitably adaptable ESPECIALLY as SWITCHING ELEMENT in a DISPLAY DEVICE, LIQUID CRYSTAL MATRIX ADDRESS.
Abstract: ELECTRODE GRID 14 A TRANSISTOR REVERSE FIELD EFFECT IS BUILT IN TITANIUM WAY TO PROVIDE TRANSISTOR FIELD EFFECT SUITABLE ESPECIALLY AS SWITCHING ELEMENT IN A DISPLAY DEVICE, LIQUID CRYSTAL MATRIX ADDRESS. IN PARTICULAR, THE EMPLOYEE IN RESERVE THE GROUND ELECTRODE GRID IS POLITE WAY OF PLASMA IN OXYGEN ATMOSPHERE OF A TOUGH TITANIUM THE GRID AND GET MORE APPROPRIATE STEPS TO FURTHER PROCESSING. USE IN EFFECT TRANSISTORS FIELD FOR DISPLAY DEVICES LIQUID CRYSTAL.
TL;DR: In this paper, the nonlinear properties of a thin layer of undoped semiconductors are studied in high electric fields, under the action of which interzone electron transitions, including tunnel transitions, take place.
Abstract: The nonlinear properties of a thin layer of undoped semiconductors are studied in high electric fields, under the action of which interzone electron transitions, including tunnel transitions, take place. The law of electric-field penetration, the value of the induced charge, and the capacitance of the layer are determined within the self-consistent field approximation.