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Showing papers on "Field-effect transistor published in 2003"


Journal ArticleDOI
Ali Javey1, Jing Guo2, Qian Wang1, Mark Lundstrom2, Hongjie Dai1 
07 Aug 2003-Nature
TL;DR: It is shown that contacting semiconducting single-walled nanotubes by palladium, a noble metal with high work function and good wetting interactions with nanotube, greatly reduces or eliminates the barriers for transport through the valence band of nanot tubes.
Abstract: A common feature of the single-walled carbon-nanotube field-effect transistors fabricated to date has been the presence of a Schottky barrier at the nanotube–metal junctions1,2,3. These energy barriers severely limit transistor conductance in the ‘ON’ state, and reduce the current delivery capability—a key determinant of device performance. Here we show that contacting semiconducting single-walled nanotubes by palladium, a noble metal with high work function and good wetting interactions with nanotubes, greatly reduces or eliminates the barriers for transport through the valence band of nanotubes. In situ modification of the electrode work function by hydrogen is carried out to shed light on the nature of the contacts. With Pd contacts, the ‘ON’ states of semiconducting nanotubes can behave like ohmically contacted ballistic metallic tubes, exhibiting room-temperature conductance near the ballistic transport limit of 4e2/h (refs 4–6), high current-carrying capability (∼25 µA per tube), and Fabry–Perot interferences5 at low temperatures. Under high voltage operation, the current saturation appears to be set by backscattering of the charge carriers by optical phonons. High-performance ballistic nanotube field-effect transistors with zero or slightly negative Schottky barriers are thus realized.

3,126 citations


Journal ArticleDOI
23 May 2003-Science
TL;DR: The fabrication of transparent field-effect transistors using a single-crystalline thin-film transparent oxide semiconductor, InGaO3(ZnO)5, as an electron channel and amorphous hafnium oxide as a gate insulator provides a step toward the realization of transparent electronics for next-generation optoelectronics.
Abstract: We report the fabrication of transparent field-effect transistors using a single-crystalline thin-film transparent oxide semiconductor, InGaO 3 (ZnO) 5 , as an electron channel and amorphous hafnium oxide as a gate insulator. The device exhibits an on-to-off current ratio of ∼10 6 and a field-effect mobility of ∼80 square centimeters per volt per second at room temperature, with operation insensitive to visible light irradiation. The result provides a step toward the realization of transparent electronics for next-generation optoelectronics.

2,724 citations


Journal ArticleDOI
Yi Cui1, Zhaohui Zhong1, Deli Wang1, Wayne U. Wang1, Charles M. Lieber1 
TL;DR: In this article, the influence of source-drain contact thermal annealing and surface passivation on key transistor properties was examined, and it was shown that thermal annaling and passivation of oxide defects using chemical modification can increase the average transconductance from 45 to 800 nS and average mobility from 30 to 560 cm 2 /V
Abstract: Silicon nanowires can be prepared with single-crystal structures, diameters as small as several nanometers and controllable hole and electron doping, and thus represent powerful building blocks for nanoelectronics devices such as field effect transistors. To explore the potential limits of silicon nanowire transistors, we have examined the influence of source-drain contact thermal annealing and surface passivation on key transistor properties. Thermal annealing and passivation of oxide defects using chemical modification were found to increase the average transconductance from 45 to 800 nS and average mobility from 30 to 560 cm 2 /V‚s with peak values of 2000 nS and 1350 cm 2 /V‚s, respectively. The comparison of these results and other key parameters with state-of-the-art planar silicon devices shows substantial advantages for silicon nanowires. The uses of nanowires as building blocks for future nanoelectronics are discussed.

2,157 citations


Patent
15 May 2003
TL;DR: In this paper, the field effect transistors (FET) have been extended to include a gate insulator layer comprising a substantially transparent material adjacent to the channel layer so as to define a channel layer/gate insulator interface.
Abstract: Enhancement mode, field effect transistors wherein at least a portion of the transistor structure may be substantially transparent. One variant of the transistor includes a channel layer comprising a substantially insulating, substantially transparent, material selected from ZnO, Sn02, or In203. A gate insulator layer comprising a substantially transparent material is located adjacent to the channel layer so as to define a channel layer/gate insulator layer interface. A second variant of the transistor includes a channel layer comprising a substantially transparent material selected from substantially insulating ZnO, Sn02or In2O3, the substantially insulating ZnO, Sn02, or In203 being produced by annealing. Devices that include the transistors and methods for making the transistors are also disclosed.

1,127 citations


Journal ArticleDOI
TL;DR: In this article, field effect transistors (FETs) based on single SnO2 and ZnO nanobelts of thicknesses between 10 and 30 nm have been fabricated.
Abstract: We have fabricated field-effect transistors (FETs) based on single SnO2 and ZnO nanobelts of thicknesses between 10 and 30 nm. Switching ratios as large as 6 orders of magnitude and conductivities as high as 15 (Ω cm)-1 are observed. Annealing SnO2 nanobelt FETs in an oxygen-deficient atmosphere produces a negative shift in gate threshold voltage, indicating doping by the generation of surface oxygen vacancies. This treatment provides an effective way of tuning the electrical performance of the nanobelt devices. The ability of SnO2 FETs to act as gas sensors is also demonstrated. SnO2 FETs with lengths of about 500 nm or less show an anomalous behavior where the conductance cannot be modulated by the gate. ZnO nanobelt FETs are sensitive to ultraviolet light. Both photogeneration of electron−hole pairs and doping by UV induced surface desorption contribute to the conductivity.

1,087 citations


Patent
24 Jun 2003
TL;DR: In this article, a gate electrode is formed on the gate insulating layer, and a source contact and a drain contact are disposed at the both sides of the gate contact and are electrically connected to the channel layer via openings.
Abstract: A zinc oxide (ZnO) field effect transistor exhibits large input amplitude by using a gate insulating layer. A channel layer and the gate insulating layer are sequentially laminated on a substrate. A gate electrode is formed on the gate insulating layer. A source contact and a drain contact are disposed at the both sides of the gate contact and are electrically connected to the channel layer via openings. The channel layer is formed from n-type ZnO. The gate insulating layer is made from aluminum nitride/aluminum gallium nitride (AlN/AlGaN) or magnesium zinc oxide (MgZnO), which exhibits excellent insulation characteristics, thus increasing the Schottky barrier and achieving large input amplitude. If the FET is operated in the enhancement mode, it is operable in a manner similar to a silicon metal oxide semiconductor field effect transistor (Si-MOS-type FET), resulting in the formation of an inversion layer.

1,048 citations


Journal ArticleDOI
TL;DR: In this paper, a perovskite-type SrTiO3 single crystal is used as the semiconducting channel for an n-type accumulation mode field effect transistor.
Abstract: A field-effect transistor has been constructed that employs a perovskite-type SrTiO3 single crystal as the semiconducting channel. This device functions as an n-type accumulation-mode device. The device was fabricated at room temperature by sputter-deposition of amorphous Al2O3 films as a gate insulator on the SrTiO3 substrate. The field-effect (FE) mobility is 0.1 cm2/V s and on-off ratio exceeds 100 at room temperature. The temperature dependence of the FE mobility down to 2 K shows a thermal-activation-type behavior with an activation energy of 0.6 eV.

1,045 citations


Journal ArticleDOI
Woong Kim1, Ali Javey1, Ophir Vermesh1, Qian Wang1, Yiming Li1, Hongjie Dai1 
TL;DR: In this paper, it was shown that the transistors exhibit hysteresis in their electrical characteristics because of charge trapping by water molecules around the nanotubes, including SiO2 surface-bound water proximal to the nanotsubes.
Abstract: Carbon nanotube field-effect transistors commonly comprise nanotubes lying on SiO2 surfaces exposed to the ambient environment. It is shown here that the transistors exhibit hysteresis in their electrical characteristics because of charge trapping by water molecules around the nanotubes, including SiO2 surface-bound water proximal to the nanotubes. Hysteresis persists for the transistors in vacuum since the SiO2-bound water does not completely desorb in vacuum at room temperature, a known phenomenon in SiO2 surface chemistry. Heating under dry conditions significantly removes water and reduces hysteresis in the transistors. Nearly hysteresis-free transistors are obtainable by passivating the devices with polymers that hydrogen bond with silanol groups on SiO2 (e.g., with poly(methyl methacrylate) (PMMA)). However, nanotube humidity sensors could be explored with suitable water-sensitive coatings. The results may have implications to field-effect transistors made from other chemically derived materials.

962 citations


Journal ArticleDOI
TL;DR: In this article, the transport properties of random networks of single-wall carbon nanotubes fabricated into thin-film transistors were investigated and shown to behave like a p-type semiconductor with a field effect mobility of ∼10 cm2/V and a transistor on-to-off ratio of ∼105.
Abstract: We report on the transport properties of random networks of single-wall carbon nanotubes fabricated into thin-film transistors. At low nanotube densities (∼1 μm−2) the networks are electrically continuous and behave like a p-type semiconductor with a field-effect mobility of ∼10 cm2/V s and a transistor on-to-off ratio ∼105. At higher densities (∼10 μm−2) the field-effect mobility can exceed 100 cm2/V s; however, in this case the network behaves like a narrow band gap semiconductor with a high off-state current. The fact that useful device properties are achieved without precision assembly of the nanotubes suggests the random carbon nanotube networks may be a viable material for thin-film transistor applications.

843 citations


Journal ArticleDOI
TL;DR: In this article, the authors demonstrate that hole transport and electron transport are both generic properties of organic semiconductors and combine the organic ambipolar transistors into functional CMOS-like inverters.
Abstract: There is ample evidence that organic field-effect transistors have reached a stage where they can be industrialized, analogous to standard metal oxide semiconductor (MOS) transistors. Monocrystalline silicon technology is largely based on complementary MOS (CMOS) structures that use both n-type and p-type transistor channels. This complementary technology has enabled the construction of digital circuits, which operate with a high robustness, low power dissipation and a good noise margin. For the design of efficient organic integrated circuits, there is an urgent need for complementary technology, where both n-type and p-type transistor operation is realized in a single layer, while maintaining the attractiveness of easy solution processing. We demonstrate, by using solution-processed field-effect transistors, that hole transport and electron transport are both generic properties of organic semiconductors. This ambipolar transport is observed in polymers based on interpenetrating networks as well as in narrow bandgap organic semiconductors. We combine the organic ambipolar transistors into functional CMOS-like inverters.

806 citations


Journal ArticleDOI
TL;DR: In this article, a new effect influencing the operation of organic field-effect transistors resulting from the choice of gate insulator material is presented, and significant benefits are achievable by the use of low-k dielectrics as opposed to the existing trend of increasing the permittivity for low operational voltage.
Abstract: In this paper, we present a new effect influencing the operation of organic field-effect transistors resulting from the choice of gate insulator material. In a series of studies it was found that the interaction between the insulator and the semiconductor materials plays an important role in carrier transport. The insulator is not only capable of affecting the morphology of the semiconductor layer, but can also change the density of states by local polarization effects. Carrier localization is enhanced by insulators with large permittivities, due to the random dipole field present at the interface. We have investigated this effect on a number of disordered organic semiconductor materials, and show here that significant benefits are achievable by the use of low-k dielectrics as opposed to the existing trend of increasing the permittivity for low operational voltage. We also discuss fundamental differences in the case of field-effect transistors with band-like semiconductors.

Patent
12 Mar 2003
TL;DR: In this paper, an imaging device is formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary MOS semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate and a charge coupled device section formed on the substrate adjacent the photrogate having a sensing node connected to the output transistor and at least one charge coupled
Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Journal ArticleDOI
TL;DR: The experimental hole mobilities extracted from both types of devices, although based on a single polymeric semiconductor, can differ by 3 orders of magnitude, demonstrating the strong dependence of the hole mobility on the charge carrier density in disordered semiconducting polymers.
Abstract: A systematic study of the hole mobility in hole-only diodes and field-effect transistors based on poly(2-methoxy-5-(3('),7(')-dimethyloctyloxy)-p-phenylene vinylene) and on amorphous poly(3-hexyl thiophene) has been performed as a function of temperature and applied bias. The experimental hole mobilities extracted from both types of devices, although based on a single polymeric semiconductor, can differ by 3 orders of magnitude. We demonstrate that this apparent discrepancy originates from the strong dependence of the hole mobility on the charge carrier density in disordered semiconducting polymers.

Journal ArticleDOI
Marcus Freitag1, Yves Martin1, James A. Misewich1, Richard Martel1, Phaedon Avouris1 
TL;DR: In this article, a single carbon nanotube incorporated as the channel of an ambipolar field-effect transistor (FET) was observed to have an estimated quantum efficiency of >10%.
Abstract: We observe infrared laser excited photoconductivity from a single carbon nanotube incorporated as the channel of an ambipolar field-effect transistor (FET). Electron−hole pairs are generated within the nanotube molecule, and the carriers are separated by an applied electric field between the source and drain contacts. The photocurrent shows resonances whose energies are in agreement with the energies of exciton states of semiconducting nanotubes of the appropriate diameter. The photocurrent is maximized for photons polarized along the direction of the carbon nanotube. Thus, the nanotube FET acts as a polarized photodetector with a diameter 1000 times smaller than the wavelength of the light it detects and has an estimated quantum efficiency of >10%. A photovoltage is observed when an asymmetric band lineup due to two nonequivalent Schottky barriers or an asymmetric coupling of the gate to the nanotube is present.

Journal ArticleDOI
21 Mar 2003-Science
TL;DR: Solid-state embossing was used to produce polymer field-effect transistors with submicrometer critical features in planar and vertical configurations for high-performance, conjugated polymer transistor circuits on flexible plastic substrates.
Abstract: The manufacture of high-performance, conjugated polymer transistor circuits on flexible plastic substrates requires patterning techniques that are capable of defining critical features with submicrometer resolution. We used solid-state embossing to produce polymer field-effect transistors with submicrometer critical features in planar and vertical configurations. Embossing is used for the controlled microcutting of vertical sidewalls into polymer multilayer structures without smearing. Vertical-channel polymer field-effect transistors on flexible poly(ethylene terephthalate) substrates were fabricated, in which the critical channel length of 0.7 to 0.9 micrometers was defined by the thickness of a spin-coated insulator layer. Gate electrodes were self-aligned to minimize overlap capacitance by inkjet printing that used the embossed grooves to define a surface-energy pattern.

Journal ArticleDOI
TL;DR: The first organic light-emitting field-effect transistor is reported, which comprises interdigitated gold source and drain electrodes on a Si/SiO(2) substrate and a polycrystalline tetracene thin film forming the active layer of the device.
Abstract: We report the first organic light-emitting field-effect transistor. The device structure comprises interdigitated gold source and drain electrodes on a $\mathrm{S}\mathrm{i}/\mathrm{S}\mathrm{i}{\mathrm{O}}_{\mathrm{2}}$ substrate. A polycrystalline tetracene thin film is vacuum sublimated on the substrate forming the active layer of the device. Both holes and electrons are injected from the gold contacts into this layer leading to electroluminescence from the tetracene. The output characteristics, transfer characteristics, and the optical emission properties of the device are reported. A possible mechanism for electron injection is suggested.

Journal ArticleDOI
TL;DR: In this article, a microscopic approach based on noncontact scanning-probe potentiometry was used to directly separate the transport properties of the transistor channel and the electrode/polymer contacts, giving very accurate experimental access to both the source and drain contact resistance.
Abstract: Parasitic contact resistance effects are becoming a major issue in organic transistors in that they can severely limit or even dominate their overall transistor performance. We present a systematic study of the contact resistance in bottom-contact polymer field-effect transistors made from poly(3-hexylthiophene) (P3HT) as well as poly-9,9′dioctyl-fluorene-co-bithiophene (F8T2). A microscopic approach based on noncontact scanning-probe potentiometry was used to directly separate the transport properties of the transistor channel and the electrode/polymer contacts, giving very accurate experimental access to both the source and drain contact resistance. The influence of the relevant parameters (temperature, electrode work function, ionization potential of the polymer, charge carrier mobility) on the source/drain contact resistance is investigated. We find that for “good” source/drain contacts that give rise to relatively small overall contact resistances (⩽50 kΩ cm), e.g., P3HT with chromium–gold electrodes...

Journal ArticleDOI
TL;DR: In this article, single-crystal Ge nanowires are synthesized by a low-temperature (275°C) chemical vapor deposition (CVD) method, and Boron doped p-type GeNW field effect transistors (FETs) with back-gates and thin SiO2 (10 nm) gate insulators are constructed.
Abstract: Single-crystal Ge nanowires are synthesized by a low-temperature (275 °C) chemical vapor deposition (CVD) method. Boron doped p-type GeNW field-effect transistors (FETs) with back-gates and thin SiO2 (10 nm) gate insulators are constructed. Hole mobility higher than 600 cm2/V s is observed in these devices, suggesting high quality and excellent electrical properties of as-grown Ge wires. In addition, integration of high-κ HfO2 (12 nm) gate dielectric into nanowire FETs with top-gates is accomplished with promising device characteristics obtained. The nanowire synthesis and device fabrication steps are all performed below 400 °C, opening a possibility of building three-dimensional electronics with CVD-derived Ge nanowires.

Journal ArticleDOI
TL;DR: In this article, the authors summarize recent progress in dilute magnetic semiconductors (DMS) such as (Ga, Mn)N, (Ga and Mn)P, (Zn, Mn), O, and SiGeN2 exhibiting room temperature ferromagnetic properties.
Abstract: Existing semiconductor electronic and photonic devices utilize the charge on electrons and holes in order to perform their specific functionality such as signal processing or light emission. The relatively new field of semiconductor spintronics seeks, in addition, to exploit the spin of charge carriers in new generations of transistors, lasers and integrated magnetic sensors. The ability to control of spin injection, transport and detection leads to the potential for new classes of ultra-low power, high speed memory, logic and photonic devices. The utility of such devices depends on the availability of materials with practical (>300 K) magnetic ordering temperatures. In this paper, we summarize recent progress in dilute magnetic semiconductors (DMS) such as (Ga, Mn)N, (Ga, Mn)P, (Zn, Mn)O and (Zn, Mn)SiGeN2 exhibiting room temperature ferromagnetism, the origins of the magnetism and its potential applications in novel devices such as spin-polarized light emitters and spin field effect transistors.

Journal ArticleDOI
TL;DR: In this paper, the organic field-effect transistors (OFETs) on the surface of single crystals of rubrene have been fabricated and the parylene polymer film has been used as the gate insulator.
Abstract: We report on the fabrication and characterization of the organic field-effect transistors (OFETs) on the surface of single crystals of rubrene. The parylene polymer film has been used as the gate insulator. At room temperature, these OFETs exhibit the p-type conductivity with the field-effect mobility 0.1–1 cm2/V s and the on/off ratio⩾104. The temperature dependence of the mobility is discussed.

Journal ArticleDOI
TL;DR: In this article, the authors proposed to combine ohmic metal-tube contacts, high dielectric constant HfO2 films as gate insulators, and electrostatically doped nanotube segments as source/drain electrodes to obtain high ON currents, sub-threshold swings of ~ 70-80 mV/decade.
Abstract: High performance enhancement mode semiconducting carbon nanotube field-effect transistors (CNTFETs) are obtained by combining ohmic metal-tube contacts, high dielectric constant HfO2 films as gate insulators, and electrostatically doped nanotube segments as source/drain electrodes. The combination of these elements affords high ON currents, subthreshold swings of ~ 70-80 mV/decade, and allows for low OFF currents and suppressed ambipolar conduction. The doped source and drain approach resembles that of MOSFETs and can impart excellent OFF states to nanotube FETs under aggressive vertical scaling. This presents an important advantage over devices with metal source/drain, or devices commonly referred to as Schottky barrier FETs.

Patent
23 Jul 2003
TL;DR: In this article, a process for manufacturing an improved PMOS semiconductor transistor is described, where the source and drain films are made of an alloy of silicon and germanium.
Abstract: A process is described for manufacturing an improved PMOS semiconductor transistor. Recesses are etched into a layer of epitaxial silicon. Source and drain films are deposited in the recesses. The source and drain films are made of an alloy of silicon and germanium. The alloy is epitaxially deposited on the layer of silicon. The alloy thus has a lattice having the same structure as the structure of the lattice of the layer of silicon. However, due to the inclusion of the germanium, the lattice of the alloy has a larger spacing than the spacing of the lattice of the layer of silicon. The larger spacing creates a stress in a channel of the transistor between the source and drain films. The stress increases IDSAT and IDLIN of the transistor. An NMOS transistor can be manufactured in a similar manner by including carbon instead of germanium, thereby creating a tensile stress.

Journal ArticleDOI
TL;DR: In this article, single-crystal organic p-type field effect transistors (OFETs) with the field effect mobility μ∼8 cm2/V's were presented.
Abstract: We report on the fabrication and characterization of single-crystal organic p-type field-effect transistors (OFETs) with the field-effect mobility μ∼8 cm2/V s, substantially higher than that observed in thin-film OFETs. The single-crystal devices compare favorably with thin-film OFETs not only in this respect: the mobility for the single-crystal devices is nearly independent of the gate voltage and the field effect onset is very sharp. The subthreshold slope as small as S=0.85 V/decade has been observed for a gate insulator capacitance Ci=2±0.2 nF/cm2. This corresponds to the intrinsic subthreshold slope Si≡SCi at least one order of magnitude smaller than that for the best thin-film OFETs and amorphous hydrogenated silicon (α-Si:H) devices.

Journal ArticleDOI
TL;DR: In this paper, the polymer-supported networks can be bent through at least 60° angles without changing their electronic properties, and they can be used to bend the transistors of a nanotube network.
Abstract: Nanotube network transistors have been transferred to polymer supports. The polymer-supported networks can be bent through at least 60° angles without changing their electronic properties. They ope...

Journal ArticleDOI
TL;DR: In this paper, the structural order of the semiconducting polymer at the interface between the poly(3-hexylthiophene) and the SiO2 gate insulator was found to be important for achieving high carrier mobility.
Abstract: Relatively high mobilities, μ=0.2 cm2 V−1 s−1 in the accumulation mode and μ=0.17 cm2 V−1 s−1 in the depletion mode, are reported for regioregular poly(3-hexylthiophene) (RR-P3HT) in field-effect transistors (FETs). Significantly higher mobility is obtained from FETs in which the RR-P3HT film is applied by dip-coating to a thickness of only 20−40 A. These observations suggest that structural order of the semiconducting polymer at the interface between the semiconducting polymer and the SiO2 gate insulator is of paramount importance for achieving high carrier mobility. Heat treatment under nitrogen at 160 °C for 3 min increases the on/off ratio of the FET.

Journal ArticleDOI
TL;DR: A crystalline titanyl phthalocyanine having diffraction peaks at least at 7.4 DEG and 9.7 DEG with one of the diffraction Peaks being the maximum is described.
Abstract: The merger of nanoscale building blocks with flexible and/or low cost substrates could enable the development of high-performance electronic and photonic devices with the potential to impact a broad spectrum of applications. Here we demonstrate that high-quality, single-crystal nanowires can be assembled onto inexpensive glass and flexible plastic substrates to create basic transistor and light-emitting diode devices. In our approach, the high-temperature synthesis of single-crystal nanowires is separated from ambient-temperature solution-based assembly to enable the fabrication of single-crystal-like devices on virtually any substrate. Silicon nanowire field-effect transistors were assembled on glass and plastic substrates and display device parameters rivaling those of single-crystal silicon and exceeding those of state-of-the-art amorphous silicon and organic transistors currently used for flexible electronics on plastic substrates. Nanowire transistor devices have been configured as low-threshold logi...

Journal ArticleDOI
TL;DR: In this article, single-crystal organic p-type field effect transistors (OFETs) with the field effect hole mobility of 8 cm2/Vs, substantially higher than that observed in thin-film OFETs, are presented.
Abstract: We report on the fabrication and characterization of single-crystal organic p-type field-effect transistors (OFETs) with the field-effect hole mobility mu \~ 8 cm2/Vs, substantially higher than that observed in thin-film OFETs. The single-crystal devices compare favorably with thin-film OFETs not only in this respect: the mobility for the single-crystal devices is nearly independent of the gate voltage and the field effect onset is very sharp. Subthreshold slope as small as S = 0.85 V/decade has been observed for a gate insulator capacitance Ci = 2 +- 0.2 nF/cm2. This corresponds to the intrinsic subthreshold slope Si = SCi at least one order of magnitude smaller than that for the best thin-film OFETs and amorphous hydrogenated silicon (a-Si:H) devices.

Journal ArticleDOI
TL;DR: In this article, the field effect transistor (FET) behavior in electrospun camphorsulfonic acid doped polyaniline (PANi)/polyethylene oxide (PE0) nanofibers was investigated.
Abstract: We report on the observation of field effect transistor (FET) behavior in electrospun camphorsulfonic acid doped polyaniline(PANi)/polyethylene oxide(PE0) nanofibers. Saturation channel currents are observed at surprisingly low source/drain voltages. The hole mobility in the depletion regime is 1.4 x 10(exp -4) sq cm/V s while the 1-D charge density (at zero gate bias) is calculated to be approximately 1 hole per 50 two-ring repeat units of polyaniline, consistent with the rather high channel conductivity (approx. 10(exp -3) S/cm). Reducing or eliminating the PEO content in the fiber is expected to enhance device parameters. Electrospinning is thus proposed as a simple method of fabricating 1-D polymer FET's.

Journal ArticleDOI
TL;DR: In this article, the authors measured conductance of single-walled semiconducting carbon nanotubes in field effect transistor (FET) geometry and investigated the device response to alcoholic vapors.
Abstract: We have measured conductance of single-walled semiconducting carbon nanotubes in field-effect transistor (FET) geometry and investigated the device response to alcoholic vapors. We observe significant changes in FET drain current when the device is exposed to various kinds of alcoholic vapors. These responses are reversible and reproducible over many cycles of vapor exposure. Our experiments demonstrate that carbon nanotube FETs are sensitive to a wide range of alcoholic vapors.

Journal ArticleDOI
TL;DR: In this paper, a GaAs MOSFET with thin Al2O3 gate dielectric in nanometer (nm) range grown by atomic layer deposition is demonstrated, which shows a good linearity, low gate leakage current, and negligible hysteresis in drain current in a wide range of bias voltage.
Abstract: A GaAs metal–oxide–semiconductor field-effect transistor (MOSFET) with thin Al2O3 gate dielectric in nanometer (nm) range grown by atomic layer deposition is demonstrated. The nm-thin oxide layer with significant gate leakage current suppression is one of the key factors in downsizing field-effect transistors. A 1 μm gate-length depletion-mode n-channel GaAs MOSFET with an Al2O3 gate oxide thickness of 8 nm, an equivalent SiO2 thickness of ∼3 nm, shows a broad maximum transconductance of 120 mS/mm and a drain current of more than 400 mA/mm. The device shows a good linearity, low gate leakage current, and negligible hysteresis in drain current in a wide range of bias voltage.