Topic
Field-programmable analog array
About: Field-programmable analog array is a research topic. Over the lifetime, 999 publications have been published within this topic receiving 15139 citations.
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10 Feb 2010
TL;DR: Fractional Order Systems Fractional order PID Controller Chaotic fractional order systems Field Programmable Gate Array, Microcontroller and Field Pmable Analog Array Implementation Switched Capacitor and Integrated Circuit Design Modeling of Ionic Polymeric Metal Composite as discussed by the authors.
Abstract: Fractional Order Systems Fractional Order PID Controller Chaotic Fractional Order Systems Field Programmable Gate Array, Microcontroller and Field Programmable Analog Array Implementation Switched Capacitor and Integrated Circuit Design Modeling of Ionic Polymeric Metal Composite
713 citations
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TL;DR: In this paper, some of the issues facing analog designers in implementing low voltage circuits are discussed, and possible low voltage design techniques are examined, along with their merits and demerits.
Abstract: Analog signal processing is fast and can address real world problems. The applications of battery powered analog and mixed mode electronic devices require designing analog circuits to operate at low voltage levels. In this paper, some of the issues facing analog designers in implementing low voltage circuits are discussed, and possible low voltage design techniques are examined. The authors describe briefly almost all low voltage design techniques suitable for analog circuit structures along with their merits and demerits.
299 citations
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16 Feb 2000TL;DR: In this article, a field programmable gate array (FPGA) which includes first and second arrays of configurable logic blocks, and first-and second-level configuration cache memories coupled to the first and the second arrays, respectively, is described.
Abstract: A field programmable gate array (FPGA) which includes first and second arrays of configurable logic blocks, and first and second configuration cache memories coupled to the first and second arrays of configurable logic blocks, respectively. The first configuration cache memory array can either store values for reconfiguring the first array of configurable logic blocks, or operate as a RAM. Similarly, the second configuration cache array can either store values for reconfiguring the second array of configurable logic blocks, or operate as a RAM. The first configuration cache memory array and the second configuration cache memory array are independently controlled, such that partial reconfiguration of the FPGA can be accomplished. In addition, the second configuration cache memory array can store values for reconfiguring the first (rather than the second) array of configurable logic blocks, thereby providing a second-level reconfiguration cache memory.
222 citations
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03 Jan 1994TL;DR: A programmable mixed-mode circuit (180) has both digital (215,217) and analog (120,120',120") circuit portions as mentioned in this paper, and the digital portion is provided by programmable digital logic while the analog portion has a variety of analog circuits, including voltage references (218), high-speed comparators (208,209) and circuits (80) that are selectively configurable to provide operational amplifier or comparator functions.
Abstract: A programmable mixed-mode circuit (180) has both digital (215,217) and analog (120,120',120") circuit portions. The digital portion (215,217) is provided by programmable digital logic. The analog portion (120,120',120") has a variety of analog circuits, including voltage references (218), high-speed comparators (208,209) and circuits (80) that are selectively configurable to provide operational amplifier or comparator functions. The analog circuits (122-125) are interconnected by programmable switch elements (128-131,160-167) so that the connection of the analog circuits to one another, to input or output pins (A0-A3,B0-B3,C0-C3) and to the digital circuitry (215,217) can be programmed.
204 citations