Showing papers on "Flip-flop published in 1972"

Zero crossing scr firing circuit network

Abstract: A firing circuit for providing time zero crossing firing of a load-controlling SCR, adapted particularly for firing a load-controlling SCR connected in circuit relationship in a single phase of a multi-phase electrical system, including an electrical power supply, a first quad section integrated circuit means connected in circuit relationship with the power supply and including a first flip flop and a second flip flop, a second dual section integrated circuit means connected in circuit relationship with the first integrated circuit means, a photo isolator to accept a logic input from another logic system and including at least one light emitting diode connected in circuit relationship with the aforesaid logic system and a photo transistor coupled to the light emitting diode and connected in circuit relationship with the first and second integrated circuit means, and a load-controlling SCR connected in circuit relationship with the first and second integrated circuit means such that zero crossing firing of the SCR is provided in accordance with a two step process which is initiated when a logic input is fed to the firing circuit through the photo isolator and regardless of when during the cycle the logic input is supplied.

Switching circuit for measuring the electrical power in two energy flow directions (delivered and returned)

Abstract: An electronic counter for measuring the electrical power in two energy flow directions (delivered and returned) is disclosed The circuit comprises an integrator for the product of current and voltage, and a first pair of threshold circuits having a predetermined positive voltage threshold circuit and a predetermined negative voltage threshold circuit connected at their outputs to a bistable flip flop circuit A second pair of threshold circuits, whose two predetermined threshold levels are higher than the threshold levels of the first pair of threshold circuits, is connected in parallel with the first pair of threshold circuits An additional flip flop circuit is connected after this second threshold circuit The outputs of the two flip flop circuits are connected via an exclusive OR circuit to the input of the integrator to change the polarity of the input signal in response to changes in direction of the power flow Two counters are connected through a gate circuit to the outputs of the flip flop circuits to count signals proportional to the power and to feed the signal to one counter for energy flow in one direction and to the second counter for energy flow in the opposite direction

Circuit and construction of semiconductor storage elements

Abstract: A flip flop circuit and structure with integrated semiconductor storage element for dynamic technique with two field-effect transistors of the flip flop.

Charge storage flip-flop

Abstract: The invention uses nonlinear impedance elements connected to the pair of transistors in a flip-flop such that the base of each transistor is connected to a high impedance if the power supply voltage is removed. Inasmuch as the high impedance forces a slow decay of charge stored in the transistors, the state of the flip-flop can be maintained by a pulsed power supply with a consequent reduction in average stand-by power. Further, using photosensitive transistors, photogenerated charge can be integrated and held. Advantageously, the apparatus is provided as an integrated circuit semiconductor memory array.

Low voltage quasi static flip-flop

Abstract: An integrated circuit providing a quasi static flip-flop function that is operable by a relatively low voltage source and requires only a single clock pulse. A pair of cross-connected latch transistors are each connected through a separate node to a load device between a power source and ground. Each node is connected through a first lead containing which is gate connected to a capacitor and it is also connected through a pair of resistor elements to the same capacitor. Between each pair of resistor elements is a second lead connected to the first lead and to ground through a transistor whose gate is connected to a single clock.

Triggered flip-flop

Abstract: A bistable multivibrator (flip-flop) including gating means for applying trigger signals to the flip-flop to effect the triggering thereof without the use of steering capacitors. The gating means includes complementary semiconductor devices which achieve a memory type function.

Integratable high speed reversible shift register

Abstract: In a shift register composed of a multiplicity of transistor flip-flops, information is clocked from one flip flop to the next one by interposing a resistor in series with a Schottky diode Schottky each clock input and the output circuit of one transistor pair and the same resistor in series with another Scottky diode between each clock input and the input circuit of the next transistor pair.

An n-ary of flip-flop cells interconnected by rows of logic gates

Abstract: A n-ary flip-flop is constructed of a series of binary cells interconnected by two rows of logic gates. One row of logic gates provides a signal to a selected ''''set'''' cell when all cells to the left of the selected cell are reset and the other row of logic gates provides a signal to the selected cell when all cells to its right are in the reset state. The logic gate signals hold the selected cell in the ''''on'''' state after the original SET signal has decayed. When a different cell is placed in the set state, one row of logic gates propagates a signal to the right of that cell to reset all gates to the right while the other row concurrently propagates a signal in the other direction to reset all gates to the left. The n-ary flip-flop is modularly expandable inasmuch as cells can be readily added to both ends of the series of cells merely by connecting each added cell to the two rows of logic gates.

Controlled stability of flip-flop circuit

Abstract: This novel working principle for a solid-state switch allows the realization of an especially simple mechanical-electrical converter for binary signals. It may be controlled by small, variable capacitances, but there are neither low-level stages nor ac. The monolithic integrated model circuit described contains only transistors and resistors.