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Showing papers on "Frequency drift published in 1968"


Journal ArticleDOI
TL;DR: In this paper, a method of oscillator design that maximizes the output power is presented, which is applicable to the class of nonlinear elements whose single frequency largesignal parameters depend on a single port voltage.
Abstract: A method of oscillator design that maximizes the output power is presented. The embedding network is derived from a set of four linear algebraic equations. The method is applicable to the class of nonlinear elements whose single frequency largesignal parameters depend on a single port voltage.

44 citations


Journal ArticleDOI
T.P. Lee1, R.D. Standley1, T. Misawa1
TL;DR: In this paper, a silicon impact avalanche transit-time diode oscillator and an amplifier were operated at 50 GHz with an overall efficiency of 2 percent, achieving phase-locking with a maximum normalized gain-bandwidth product of 0.1.
Abstract: Recent experimental observations on a silicon impact avalanche transit-time diode oscillator and amplifier CW-operated at 50 GHz are presented. 1) CW oscillation power of 100 mW was obtained at an overall efficiency of 2 percent. The oscillation frequency was continuously tunable over a 1.3-GHz range by a sliding short. 2) Phase-locking has been achieved with a maximum normalized gain-bandwidth product of 0.1. The minimum locking signal power required for a 500-MHz locking bandwidth was 20 dB below the oscillator output. 3) Electronic tuning of the oscillator frequency was demonstrated by placing a millimeter-wave varactor diode in the tuning circuit. The output frequency versus the bias voltage on the varactor diode was linear with maximum frequency deviation of 300 MHz. Frequency modulation of the oscillator by driving the varactor with a sinusoidal source was obtained at a modulation frequency of 50 MHz. 4) Stable amplification with 13-dB gain was obtained, centered at 52.885 GHz with a 3-dB bandwidth of 1 GHz. The maximum output power obtained was 16 mW. Higher gain of about 17 dB was obtained at a reduced bandwidth. The noise figure of the amplifier was 36 dB. Equivalent circuits for the oscillator and the amplifier are derived. The calculated results agree reasonably well with the experimental observations.

25 citations


Journal ArticleDOI
J.W. Gewartowski1
01 Jun 1968
TL;DR: Theoretical results for the transmission efficiency in an IMPATT diode oscillator were derived in this article.The transmission efficiency is a measure of the RF losses in the passive diode resistance and the circuit which couples the diode to the load.
Abstract: Theoretical results are derived for the transmission efficiency in an IMPATT diode oscillator. The transmission efficiency is a measure of the RF losses in the passive diode resistance and the circuit which couples the diode to the load.

19 citations


Patent
23 Aug 1968
TL;DR: In this article, a variable capacitor is provided in circuit with the crystal so as to correct for the crystal frequency drifts due to changes in operation of the crystal over extended periods of time.
Abstract: A crystal controlled oscillator is frequency sensitive to variations in crystal load capacitance in circuit with the crystal, to variations in temperature and to operation over extended periods of time. A variable capacitor is provided in circuit with the crystal so as to correct for the crystal frequency drifts due to changes in operation of the crystal over extended periods of time. A separate fixed capacitor is connected in series with the crystal and in circuit with the variable capacitor to provide part of the frequency determining circuit of the crystal oscillator. A temperature compensation network is coupled across the fixed capacitor and is responsive to temperature changes to provide a correct degree of load capacitance change in the circuit so that the oscillator frequency is maintained within a given frequency tolerance regardless of the adjustment of the variable capacitor which is used to adjust the crystal for frequency drift.

17 citations


Journal ArticleDOI
TL;DR: In this paper, the frequency drift in giant pulse ruby laser was investigated using a photomixing system and it was shown that the drift is due to an inversion dependent change of the polarizability of ruby.

17 citations



Journal ArticleDOI
TL;DR: This paper presents a unique digital realization of an automatic frequency control (AFC) for tracking signals that are slowly drifting in frequency, consisting of two stagger-tuned digital filters, whose squared outputs are differenced and averaged.
Abstract: This paper presents a unique digital realization of an automatic frequency control (AFC) for tracking signals that are slowly drifting in frequency. The frequency discriminator consists of two stagger-tuned digital filters, whose squared outputs are differenced and averaged. The frequency tracking is performed by changing the centers of the digital filters and hence the discriminator characteristic. This can be done easily by only a few cosine calculations. The digital loop filter, operating at a much slower sampling rate than the discriminator filters, is designed to minimize probability of loss of lock. Zero mean white additive Gaussian noise is inserted in the linearized loop to account for both the additive channel noise and the short-term signal instabilities. The variance of the frequency estimate is then calculated. The only assumption made on the frequency drift process is that the drift rate be less than a given value. A worst-case analysis is performed to obtain the largest possible mean frequency error. Loss of lock is said to occur when the actual frequency error is greater than the width of the linear portion of the discriminator characteristic.

15 citations



Patent
03 Oct 1968
TL;DR: In this article, a gate is controlled by the output of a comparator circuit which compares the amplitude of a ramp signal with the DC control voltage, and the gate passes the oscillator output pulses as long as the ramp signal amplitude is less than the control voltage.
Abstract: A circuit for providing output pulses at a frequency determined by a variable DC control voltage. The circuit includes a gate to which an oscillator output is applied. The gate is controlled by the output of a comparator circuit which compares the amplitude of a ramp signal with the DC control voltage. The ramp signal is generated at a frequency which is a subharmonic of the oscillator frequency. The gate passes the oscillator output pulses as long as the ramp signal amplitude is less than the DC control voltage.

14 citations


Patent
Lucijan Auer1
24 Jun 1968

14 citations


Patent
18 Jul 1968
TL;DR: In this paper, a NORMALLY CLAMPED OSCILLATOR OPERates as a high-freewe rt switching CIRCUIT and it is CONTROLLED by an ACTUATABLE OSCillator control controller.
Abstract: THIS IS PROVIDED A HIGH POWER, CURRENT LIMITED, VOLTAGE REGULATED POWER CONVERTER SUITABLE FOR PRINTED CIRCUIT BOARD MOUNTING. A NORMALLY CLAMPED OSCILLATOR OPERATES AS A HIGH FREQUENCY SWITCHING CIRCUIT AND IT IS CONTROLLED BY AN ACTUATABLE OSCILLATOR CONTROL CIRCUIT. THE OPERATING FREQUENCY OF THE OSCILLATOR IS CONTROLLED SO AS TO PROVIDE A DC OUTPUT LEVEL WHICH IS MAINTAINED AT A PREDETERMINED LEVEL. UNDER A CLAMPED CONDITION, USUALLY AT NO LOAD, THE FREQUENCY REQUIRED TO GIVE THIS LEVEL IS THE LOWER OPERATING FREQUENCY LIMIT. A COMPARISON CIRCUIT CONTINUOUSLY COMPARES THE DC OUTPUT VOLTAGE WITH A PREDETERMINED LEVEL SET BY REFERENCE SETTING CIRCUIT. SHOULD THE DC OUTPUT VOLTAGE START TO FALL BELOW THE PREDETERMINED LEVEL, A VOLTAGE SIGNAL IS PRODUCED BY THE COMPARISON CIRCUIT. THIS VOLTAGE SIGNAL IS DIRECTED TO THE OSCILLATOR CONTROL CIRCUIT TO UNCLAMP THE OSCILLATOR TO OSCILLATE AT A FREQUENCY NECESSARY TO RESTOR THE OUPUT VOLTAGE TO THE PREDETERMINED VOLTAGE LEVEL.

Patent
24 Dec 1968
TL;DR: In this paper, a variable frequency harmonic oscillator including a voltage tunable crystal controlled resonator incorporating a quartz crystal unit with precisely antiresonated (neutralized) static capacitance operating substantially at the series resonant frequency of the quartz crystal as opposed to the antireonant frequency thereof and a voltage variable reactance network coupled thereto having a linear reactance vs. voltage characteristic, the coupling being by means of a reactive transformer, two elements of which are absorbed in combination with elements of the neutralized crystal and variable reactionance networks.
Abstract: A variable frequency harmonic oscillator including a voltage tunable crystal controlled resonator incorporating a quartz crystal unit with precisely antiresonated (neutralized) static capacitance operating substantially at the series resonant frequency of the quartz crystal as opposed to the antiresonant frequency thereof and a voltage variable reactance network coupled thereto having a linear reactance vs. voltage characteristic, the coupling being by means of a reactive transformer, two elements of which are absorbed in combination with elements of the neutralized crystal and variable reactance networks. Additionally a maintaining circuit is coupled to the resonator forming an oscillator thereby and including a circuit providing a means for suppressing spurious oscillations at undesired frequencies below the desired frequency band of operation.

Patent
02 Dec 1968
Abstract: 1,210,612. Keyboard Circuits. P. LUCAS. 27 Nov., 1968 [8 Dec., 1967], No.56225/68. Heading G4H. [Also in Division H4] A telephone or data subscriber's keysender comprises logic circuitry which is effective to transmit pulse sequences characteristic of the digit corresponding to a depressed key, each sequence being preceding by an identifying pulse train which is the same for all digits. As shown in Fig. 1, the positive and negative excursions of a sinusoidal or rectangular pulse train provided by generator 240 are applied to respective buses t, t as well as to a frequency dividing chain of flip-flops 243, 244. Operation of a digit key 0-15 closes one each of switches 6 0 -6 3 and a 0 -a 3 and additionally connects the logic 26 to line 21 by closure of switch C. The line connection may be in series or parallel with the loop. The logic is such that irrespective of which key is operated a pulse train as shown in the " identification signal " both in Fig 3 is always transmitted before the digit signalshown in the " characteristic signal " box. Each of these two signals lasts for two cycles of the fundamental pulse train which may have a frequency of, e.g. 500 c.p.s. The two signal detectors 30 are provided in order to allow for line polarity reversals but only one can provide a significant output at a time. Each detector (Fig. 4) includes an oscillator 32 whose frequency is approximately four times that of the oscillator in a keysender, a flip-flop chain 41 for detecting pulse polarity changes in the incoming signal and a sixteen-stage shift register 33 into which successive pairs of signals are fed. Provided a signal pair is identical, i.e. the signals are genuine " digits " and not spurious noise, a significant output corresponding thereto is supplied to a central control unit. It is pointed out that the above described system can tolerate up to 15% frequency drift in the keysender oscillators without any untoward effects.

Patent
03 Apr 1968
TL;DR: In this paper, a frequency synthesizer particularly suitable for VHF applications comprising a pair of variable frequency oscillators adapted to be simultaneously tuned in coarse frequency steps, one of the oscillators being phase locked to a frequency standard, and the second oscillator being controlled by a tunable frequency lock loop referenced to the first oscillator to provide the synthesized frequency output.
Abstract: A frequency synthesizer particularly suitable for VHF applications comprising a pair of variable frequency oscillators adapted to be simultaneously tuned in coarse frequency steps, one of the oscillators being phase locked to a frequency standard, and the second oscillator being controlled by a tunable frequency lock loop referenced to the first oscillator to provide the synthesized frequency output. The tunable frequency lock loop includes a balanced mixer coupled at the outputs of the two oscillators for producing a difference frequency, a frequency discriminator for providing a voltage signal proportional to this difference frequency, a continuously or discretely variable tuning voltage, and a difference amplifier which compares the discriminator output with a selected tuning voltage and provides a difference signal for fine tuning the second oscillator.

Patent
08 May 1968
TL;DR: In this article, a binary coded date is represented by only one-half a cycle of one frequency and a space by another frequency and the receiver is arranged to reorganize the respective frequency from examining each half-cycle.
Abstract: In data transmission system for the transmission of binary coded date a mark is represented by only one-half a cycle of one frequency and a space by only one-half a cycle of another frequency. The receiver is arranged to reorganize the respective frequency from examining each half-cycle.

Patent
23 Dec 1968
TL;DR: In this paper, the authors proposed a method for compensating the temperature variation in the oscillation frequency of an oscillator wherein an impedance element, for example, a capacitor coupled to the oscillator is switched between two levels of its value, whereby the temperature variations are compensated for on an average.
Abstract: Method of and device for compensating the temperature variation in the oscillation frequency of an oscillator wherein an impedance element, for example, a capacitor coupled to the oscillator is switched between two levels of its value, whereby the temperature variation is compensated for on an average.

Patent
10 Sep 1968
TL;DR: In this paper, a frequency deviation monitor utilizes a reversible or up-down counter for determining the amount of frequency shift of a carrier oscillator signal, which is used to count down a reversible counter having the unshifted frequency stored therein.
Abstract: A frequency deviation monitor utilizes a reversible or up-down counter for determining the amount of frequency shift of a carrier oscillator signal. A modulating signal is peak detected and thence applied to the carrier oscillator to shift the output frequency. This shifted frequency is used to count down a reversible counter having the unshifted frequency stored therein. The difference between the counts during a predetermined time interval is determinative of the frequency deviation.

Patent
10 Oct 1968
TL;DR: A VOLTAGE CONTROLLED OSCILLATOR as mentioned in this paper is a VOLUME 7, 2017 VOLUME 6, 2019 VOLUME 5, 2019 OSCLLATOR that provides a controllable output over a wide range from a FEW HUNDREDTHS of a HERTZ to a MEGAHERTZ with a high degree of stability.
Abstract: A VOLTAGE CONTROLLED OSCILLATOR PROVIDING OUTPUT PULSES CONTROLLABLE IN FREQUENCY OVER A WIDE RANGE FROM A FEW HUNDREDTHS OF A HERTZ TO MEGAHERTZ WITH A HIGH DEGREE A ACCURACY AND STABILITY. THE OSCILLATOR EMPLOYS A TRANSISTOR CONSTANT CURRENT SOURCE FOR CHARGING AN ADJUSTABLE R-C TIMING CIRCUIT WHICH TRIGGERS A FEEDBACK CONTROLLED SWITCHING TRANSISTOR CIRCUIT. THE SWITCHING TRANSISTOR CIRCUIT ACTIVATES A SEPARATE TRANSISTOR DISCHARGE CIRCUIT WHICH ALSO SERVES FOR ISOLATING THE TRIGGERING INPUT FROM THE SWITCHING TRANSISTOR DURING SWITCHING TO ALLOW RAPID RESET OF THE TIMING CIRCUIT AND TO IMPROVE THE OUTPUT WAVEFORM.


Patent
23 Dec 1968
TL;DR: A HIGHLY STABLE CRYSTALOSCILLATOR for KEEPING TIME PRECISELY wherein the FREQUENCY DRIFT DUE TO AGING OF a QUARTZ CRY STAL is COMPENSATED by a PROGRAMMED ELECTROMECHANICAL TUNING DEVICE as mentioned in this paper.
Abstract: A HIGHLY STABLE CRYSTAL OSCILLATOR FOR KEEPING TIME PRECISELY WHEREIN THE FREQUENCY DRIFT DUE TO AGING OF A QUARTZ CRYSTAL IS COMPENSATED BY A PROGRAMMED ELECTROMECHANICAL TUNING DEVICE.

Patent
23 Oct 1968
TL;DR: In this article, the output of an adjustable oscillator is evaluated in a digital frequency counter whose count, together with a signal from a manually settable digital frequency selector, is applied to a comparison circuit.
Abstract: Decadic frequency generator wherein the output of an adjustable oscillator is evaluated in a digital frequency counter whose count, together with a signal from a manually settable digital frequency selector, is applied to a comparison circuit; in response to any disparity between the count and the selector signal, an analogue voltage is applied to a control circuit of the oscillator to effect a corrective adjustment.


Patent
24 Jan 1968
TL;DR: A radio receiver adjusts its center frequency according to the center frequency differential between the receiver and associated transmitter, maintains the correction for a time after transmission ceases, opens the circuit to the load driven by the receiver, and grounds the load circuit.
Abstract: A radio receiver adjusts its center frequency according to the center frequency differential between the receiver and associated transmitter, maintains the correction for a time after transmission ceases, opens the circuit to the load driven by the receiver and grounds the load circuit.

Journal ArticleDOI
TL;DR: The design of a system for the synthesis of one frequency from another is discussed in terms of mathematical methods of approximating real numbers, the ratio of the frequencies being the number approximated.
Abstract: The design of a system for the synthesis of one frequency from another is discussed in terms of mathematical methods of approximating real numbers, the ratio of the frequencies being the number approximated. A general equation describing the frequency synthesis process is derived and it is shown, using charts, how block diagrams for a frequency synthesizer can be developed from the solutions of this equation. Examples are given for a synthesizer which compares the frequency of an ammonia N15H3 maser with a standard frequency of 5 MHz, and for a synthesizer which offsets a standard frequency of 100 kHz by steps of 1×10-5 Hz.


Patent
06 Sep 1968
TL;DR: In this article, the drift velocity is a function of the strength of the bias voltage, and an amplitude modulated signal can be used to vary bias voltage thereby varying the recirculation frequency of the pulse.
Abstract: In a properly cut sample of selectively doped semiconductor material, such as germanium, with a selected bias voltage applied along the longitudinal axis, a small transverse voltage applied across one end of the sample produces a transversely polarized domain, which, under the influence of the bias voltage, drifts along the longitudinal axis of the sample. Because the drift velocity is a function of the strength of the bias voltage, and because a pulse injected into the sample can be continuously recirculated at a frequency proportional to the drift velocity, an amplitude modulated signal can be used to vary the bias voltage thereby varying the recirculation frequency of the pulse. As a result, the device can be made to act as either a frequency or a phase modulator.

Journal ArticleDOI
TL;DR: In this article, the influence of contamination level on the aging behavior of quartz crystal resonators has been studied and the difference in aging behavior is discussed in terms of a possible aging mechanism.
Abstract: The influence of contamination level on the aging behavior of quartz crystal resonators has been studied. Resonators were made using high-temperature bonding techniques and were baked prior to sealing in both dry hydrogen and under high vacuum in order to minimize the level of contamination within the enclosure. The initial stabilization period for the frequency drift rate to reach 3 parts per 1010/month and the period to restabilize after power interruption to oven and oscillator is usually less than a week for these units. The time periods to reach the same drift rate for units made using the current state-of-the-art fabrication tecnhiques range from one to six months. The difference in aging behavior is discussed in terms of a possible aging mechanism.


Patent
25 Apr 1968