Frequency drift

About: Frequency drift is a research topic. Over the lifetime, 5054 publications have been published within this topic receiving 56191 citations. The topic is also known as: chirp rate.

Comparison of Different Frequency Controllers for a VSC-HVDC Supplied System

Abstract: This paper studies three different frequency controllers and their effects on the voltage disturbance ride-through capability of a VSC-HVDC supplied industrial system. The idea of implementing frequency controller is to improve the power quality of industrial plants by slightly decreasing the VSC output voltage frequency since industrial processes are more sensitive to voltage drops than frequency deviations. The first two controllers, frequency controllers I and II, are fixed frequency controllers and the third one, frequency controller III, is a PI frequency controller. In order to compare three different controllers, a system with a simplified VSC-HVDC and different load types is simulated in PSCAD/EMTDC. Simulation results show that with frequency controller III, the VSC-HVDC supplied industrial plant can avoid a voltage collapse by decreasing frequency during or after disturbances. Furthermore, with an increase of the converter current limit, the possibility of mitigating voltage dips increases. For frequency controllers I and II, the extent of the disturbance ride-through capability depends on the current limit of the VSC-HVDC. A higher current limit results in a higher ride-through capability. The effect of the dc capacitor on improving the system voltage disturbance tolerance is also investigated during and after disturbances when the VSC-HVDC uses frequency controller I. The system voltage disturbance ride-through capability increases with an increase of the dc capacitance or the current limit.

A Low-Noise Multi-GHz CMOS Multiloop Ring Oscillator With Coarse and Fine Frequency Tuning

Abstract: A 7-GHz CMOS voltage controlled ring oscillator that employs multiloop technique for frequency boosting is presented in this paper. The circuit permits lower tuning gain through the use of coarse/fine frequency control. The lower tuning gain also translates into a lower sensitivity to the voltage at the control lines. Fabricated in a standard 0.13-mum CMOS process, the proposed voltage-controlled ring oscillator exhibits a low phase noise of -103.4 dBc/Hz at 1 MHz offset from the center frequency of 7.64 GHz, while consuming a current of 40 mA excluding the buffer.

A Two-Stage Ring Oscillator in 0.13- $\mu{\hbox{m}}$ CMOS for UWB Impulse Radio

Abstract: We present a two-stage digitally controlled ring oscillator designed mainly for impulse-radio ultra-wideband (UWB) applications. Each basic stage utilizes a local positive feedback, allowing to achieve steady oscillation at low current consumption levels, and to extend the frequency tuning over an ultra-wide range. The frequency tuning is achieved via the control of the tail resistor in each stage. The circuit is fabricated in a 0.13-mum CMOS technology. It features full UWB coverage at slightly higher than 1.3-V supply voltage, -121.7-dBc/Hz phase noise at a 5.6-GHz carrier, and 10-MHz offset, and less than 5-mW power consumption for the digitally controlled oscillator core alone at 10.18-GHz maximum frequency under 1.3-V supply voltage.

A 3 ppm 1.5 × 0.8 mm 2 1.0 µA 32.768 kHz MEMS-Based Oscillator

Abstract: This paper describes the first 32 kHz low-power MEMS-based oscillator in production. The primary goal is to provide a small form-factor oscillator (1.5 × 0.8 mm 2 ) for use as a crystal replacement in space-constrained mobile devices. The oscillator generates an output frequency of 32.768 kHz and its binary divisors down to 1 Hz. The frequency stability over the industrial temperature range (–40 °C to 85 °C) is ±100 ppm as an oscillator (XO) or ±3 ppm with optional calibration as a temperature compensated oscillator (TCXO). Supply currents are 0.9 µA for the XO and 1.0 µA for the TCXO at supply voltages from 1.4 V to 4.5 V. The MEMS resonator is a capacitively-transduced tuning fork at 524 kHz. The circuitry is fabricated in 180 nm CMOS and includes low power sustaining circuit, fractional-N PLL, temperature sensor, digital control, and low swing driver.

A Low-Power 2.4-GHz Current-Reused Receiver Front-End and Frequency Source for Wireless Sensor Network

Abstract: In this paper, we present a receiver front-end and a frequency source suitable for wireless sensor network applications, in which power consumption is severely restricted under several milliwatts. For such an extremely low-power receiver, current-reusing and frequency multiplying schemes are proposed for both the RF front-end and frequency source. The proposed front-end achieves a conversion gain of 30.5 dB and a noise figure of 10.2 dB at the 10-MHz intermediate frequency (IF), taking only 500-muA bias current from a 1.0-V supply voltage. The measured phase noise of the fabricated frequency source is -115.83 dBc/Hz at 1 MHz offset from a 2.2-GHz center frequency, taking 840 muA from a 0.7-V supply. The front-end performance is compared with the previously reported low-power front-ends operating in similar frequency ranges