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Frequency drift

About: Frequency drift is a research topic. Over the lifetime, 5054 publications have been published within this topic receiving 56191 citations. The topic is also known as: chirp rate.


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Patent
18 Apr 1973
TL;DR: In this article, a ceramic crystal transducer is connected to a direct current supply in series with a pair of transistors, each controlling one of the transistors to produce a frequency and a voltage to excite the crystal at the order of the natural resonant frequency.
Abstract: A ceramic crystal transducer is connected to a direct current supply in series with a pair of transistors. A pair of independent multivibrator oscillators are connected, each controlling one of the transistors. Each oscillator establishes a rectangular wave and is provided with a continuously adjustable resistor for controlling the output frequency of the corresponding oscillator. The one oscillator is constructed to produce a frequency and a voltage to excite the crystal at the order of the natural resonant frequency and to thereby produce an audio output signal. The second multivibrator oscillator selectively controls the second transistor to control the on/off or pulsing rate of the tone related audible signal. The crystal is pulsed at the output rate of the tone oscillator and vibrates at the fundamental frequency of the rectangular wave as well as harmonics to either side of such fundamental frequency to produce a full and pleasant sound. Variation of the repetition rate of the output signal of the tone generator to either side of the natural resonant frequency of the crystal correspondingly varies the pitch and intensity of the emitted sound to distinguish adjacent alarms. The pulse rate oscillator permits further distinction by adjustment of the signal duty cycle.

32 citations

Journal ArticleDOI
TL;DR: In this paper, an event recognition-analysis system that can automatically detect solar type III radio burst and mine information of the burst from the dynamic spectra observed by Nancay Decameter Array (NDA).
Abstract: Aims . We design an event recognition-analysis system that can automatically detect solar type III radio burst and can mine information of the burst from the dynamic spectra observed by Nancay Decameter Array (NDA). We investigate the frequency drift rate of type III bursts and the speed of electron beams responsible for the generation of the bursts.Methods . Several computer vision methods are used in this automatic analysis system. The Hough transform is performed to recognize the line segment associated with type III bursts in the dynamic spectra. A modified active contour model is used to track the backbone of the burst and estimate the frequency drift rate at different frequency channels. We run this system on the NDA data from 2012 to 2017, and give a statistical survey of the event number distribution, the starting and stopping frequencies of bursts, the frequency dependence of the drift rate, and the exciter speed using three corona density models.Results . The median value of the average frequency drift rates is about 6.94 MHz s−1 for 1389 simple well-isolated type III bursts detected in the frequency range 10–80 MHz of NDA observation. The frequency drift rate changes with frequency as d f /dt = −0.0672 f 1.23 from a least-squares fitting. The average exciter speed is about 0.2c based the density models. We do not find any significant dependence of the drift rate and the exciter speed on the solar activity cycle.

32 citations

Journal ArticleDOI
TL;DR: In this article, the authors demonstrate the implementation of a Rb87 chip-scale atomic clock (CSAC) that has improved long-term stability by using variations in the light intensity and LFD.
Abstract: We demonstrate the implementation of a Rb87 chip-scale atomic clock (CSAC) that has improved long-term stability. A simple method of reducing the frequency drift in the CSAC is proposed. As well as the well-known effect of light intensity on the clock frequency, our analysis shows that the frequency drift that is due to laser frequency detuning (LFD) variation originates from asymmetry in the coherent laser fields, and thus, we propose to actively compensate the clock frequency by using variations in the light intensity and LFD. We performed experiments to obtain precise clock frequency sensitivities to the light intensity and LFD, and the frequency drift was reduced from 7.1×10−11/day to 6.9×10−13/day with the frequency compensation method. Additionally, the CSAC with an optimized configuration of light intensity and microwave power showed evident long-term frequency stability improvement, from 8.9×10−11 to 8.7×10−12 at 105 s. Therefore, our method is useful in reducing the frequency drift of CSACs and could be potentially used in applications that require moderate long-term stability of sub-1×10−11.

32 citations

Journal ArticleDOI
TL;DR: In this paper, a 10.5-to 11-GHz fully monolithic voltage controlled oscillator circuit implemented in a standard SiGe bipolar technology is presented, achieving phase noise of -78 to -87 dBc/Hz at 100-kHz offset.
Abstract: A 10.5- to 11-GHz fully monolithic voltage controlled oscillator circuit implemented in a standard SiGe bipolar technology is presented. An oscillator phase noise of -78 to -87 dBc/Hz is achieved at 100-kHz offset. The tuning range is close to 5% with an on-chip varactor-tuned resonator and for a control voltage of 0 to 3 V. The circuit draws less than 8 mA from a 3-V supply including the reference branch bias current.

32 citations

Patent
26 Jun 1979
TL;DR: In this article, a phase-locked loop motor drive system with a crystal-controlled frequency source for generating reference frequency pulses at a selectable frequency for driving the motor at a desired speed and a frequency divider coupled to the oscillator to reduce the frequency to a suitable value as a reference frequency for comparison with the frequency and phase of a signal derived from the motor.
Abstract: A phase-locked loop motor drive system includes a crystal-controlled frequency source for generating reference frequency pulses at a selectable frequency for driving the motor at a desired speed and a frequency divider coupled to the oscillator to reduce the oscillator frequency to a suitable value as a reference frequency for comparison with the frequency and phase of a signal derived from the motor. In order to provide fine adjustment of the motor speed, a speed control circuit is connected between the oscillator and the frequency divider to inhibit the passage of the oscillator pulses to the frequency divider for a selectable period immediately following an output pulse from the frequency divider when it is desired to decrease the motor speed, and inject a train of higher frequency pulses into the frequency divider while the passage of the oscillator pulses is inhibited when it is desired to increase the motor speed.

32 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20237
202217
202150
202059
201963
201887