Showing papers on "Gallium nitride published in 2004"

30-W/mm GaN HEMTs by field plate optimization

Abstract: GaN high-electron-mobility-transistors (HEMTs) on SiC were fabricated with field plates of various dimensions for optimum performance Great enhancement in radio frequency (RF) current-voltage swings was achieved with acceptable compromise in gain, through both reduction in the trapping effect and increase in breakdown voltages When biased at 120 V, a continuous wave output power density of 322 W/mm and power-added efficiency (PAE) of 548% at 4 GHz were obtained using devices with dimensions of 055/spl times/246 /spl mu/m/sup 2/ and a field-plate length of 11 /spl mu/m Devices with a shorter field plate of 09 /spl mu/m also generated 306 W/mm with 496% PAE at 8 GHz Such ultrahigh power densities are a dramatic improvement over the 10-12 W/mm values attained by conventional gate GaN-based HEMTs

High-Brightness Light Emitting Diodes Using Dislocation-Free Indium Gallium Nitride/Gallium Nitride Multiquantum-Well Nanorod Arrays

Abstract: We demonstrate the realization of the high-brightness and high-efficiency light emitting diodes (LEDs) using dislocation-free indium gallium nitride (InGaN)/gallium nitride (GaN) multiquantum-well (MQW) nanorod (NR) arrays by metal organic-hydride vapor phase epitaxy (MO−HVPE) MQW NR arrays (NRAs) on sapphire substrate are buried in spin-on glass (SOG) to isolating individual NRs and to bring p-type NRs in contact with p-type electrodes The MQW NRA LEDs have similar electrical characteristics to conventional broad area (BA) LEDs However, due to the lack of dislocations and the large surface areas provided by the sidewalls of NRs, both internal and extraction efficiencies are significantly enhanced At 20 mA dc current, the MQW NRA LEDs emit about 43 times more light than the conventional BA LEDs, even though overall active volume of the MQW NRA LEDs is much smaller than conventional LEDs Moreover, the fabrication processes involved in producing MQW NRA LEDs are almost the same for conventional BA LED

Gallium Nitride-Based Nanowire Radial Heterostructures for Nanophotonics

Abstract: We report a new and general strategy for efficient injection of carriers in active nanophotonic devices involving the synthesis of well-defined doped core/shell/shell (CSS) nanowire heterostructures. n-GaN/InGaN/p-GaN CSS nanowire structures were grown by metal-organic chemical vapor deposition. Electron microscopy images reveal that the CSS nanowires are defect-free single crystalline structures, while energy-dispersive X-ray linescan profile studies confirm that shell thickness and composition can be well controlled during synthesis. Photoluminescence data further show that the optical properties are controlled by the CSS structure with strong emission from the InGaN shell centered at 448 nm. Importantly, electrical devices made by simultaneously contacting the n-type core and outer p-type shell of the CSS nanowires demonstrate that in forward bias these individual nanowires behave as light-emitting diodes (LEDs) with bright blue emission from the InGaN shell. The ability to rationally synthesize galliu...

Crystallographic alignment of high-density gallium nitride nanowire arrays

Abstract: Single-crystalline, one-dimensional semiconductor nanostructures are considered to be one of the critical building blocks for nanoscale optoelectronics1 Elucidation of the vapour–liquid–solid growth mechanism2 has already enabled precise control over nanowire position and size1,3,4,5,6,7,8, yet to date, no reports have demonstrated the ability to choose from different crystallographic growth directions of a nanowire array Control over the nanowire growth direction is extremely desirable, in that anisotropic parameters such as thermal and electrical conductivity, index of refraction, piezoelectric polarization, and bandgap may be used to tune the physical properties of nanowires made from a given material Here we demonstrate the use of metal–organic chemical vapour deposition (MOCVD) and appropriate substrate selection to control the crystallographic growth directions of high-density arrays of gallium nitride nanowires with distinct geometric and physical properties Epitaxial growth of wurtzite gallium nitride on (100) γ-LiAlO2 and (111) MgO single-crystal substrates resulted in the selective growth of nanowires in the orthogonal [110] and [001] directions, exhibiting triangular and hexagonal cross-sections and drastically different optical emission The MOCVD process is entirely compatible with the current GaN thin-film technology, which would lead to easy scale-up and device integration

Metal organic vapour phase epitaxy of GaN and lateral overgrowth

Abstract: Gallium nitride (GaN) is an extremely promising wide band gap semiconductor material for optoelectronics and high temperature, high power electronics. Actually, GaN is probably the most important semiconductor since silicon. However, achievement of its full potential has still been limited by a dramatic lack of suitable GaN bulk single crystals. GaN has a high melting temperature and a very high decomposition pressure; therefore it cannot be grown using conventional methods used for GaAs or Si like Czochraslski or Bridgman growths.Since there is no GaN bulk single crystal commercially available, all technological development of GaN-based devices relies on heteroepitaxy. Most of the current device structures are grown on sapphire or 6H-SiC. However, since their lattice parameters and thermal expansion coefficients are not well-matched to GaN, the epitaxial growth generates huge densities of defects, with threading dislocations (TDs) being the most prevalent (109–1011 cm−2). As a comparison, homoepitaxially grown GaAs exhibits ~102–104 dislocation cm−2, and homoepitaxial Si almost 0. Actually this large density of TDs in GaN drastically limits the performance and operating lifetime of nitride-based devices. Therefore, there is currently a tremendous technological effort to reduce these defects.Metal organic vapour phase epitaxy (MOVPE) is currently the most widely used technology. Actually, all optoelectronic commercial device structures are fabricated using MOVPE. In MOVPE, the most appropriate precursor for nitrogen is ammonia (NH3), whereas either trimethyl or triethylgallium may be used as a gallium source. MOVPE of GaN requires a high partial pressure of NH3, high growth temperatures (~1000–1100°C) and a growth chamber specially designed to avoid premature reactions between the ammonia and gallium alkyls. Since sapphire (or 6H-SiC) and GaN are highly mismatched, direct growth of GaN is impossible. Therefore, the growth of GaN on any substrate first requires the deposition of a buffer layer, which, to some extent, accommodates the mismatch. Using appropriate nucleation layers allows a reduction of the dislocation density to the low 108 cm−2 range.Though laser diodes (LDs) were demonstrated in the late 1990s with such defect layers, the real breakthrough in laser technology was the dramatic improvement of the LD lifetime at the end of 1997, with the lifetime reaching 10 000 h. This was made possible by implementation of epitaxial lateral overgrowth (ELO) technology, which significantly reduces the dislocation density to below 107 cm−2.In ELO technology, parts of the highly dislocated starting GaN are masked with a dielectric mask, after which growth is restarted. At the beginning of the second growth step, deposition only occurs within the openings, with no deposition observed on the mask. This is referred to as selective area epitaxy (SAE). The TDs are prevented from propagating into the overlayer by the dielectric mask, whereas GaN grown above the opening (coherent growth) keeps the same TD density as the template, at least during the early stages of growth.Currently, two main ELO technologies exist: the simpler one involves a single growth step on striped openings. In this one-step-ELO (1S-ELO), growth in the opening remains in registry with the GaN template underneath (coherent part), whereas the GaN over the mask extends laterally (wings). This leads to two grades, namely highly dislocated GaN, above the openings, and low dislocation density GaN, above the masks. With this technique, devices have to be fabricated on the wings. Conversely, in the two-step-ELO (2S-ELO) process, the growth conditions of the first step are monitored to obtain triangular stripes. Inside these stripes, the TDs arising from the templates are bent by 90° when they encounter the inclined lateral facet. In the second step, the growth conditions are modified to achieve full coalescence. In this 2S-ELO technology, only the coalescence boundaries are defective. ELO technology produces high quality GaN, with TD densities in the mid 106 cm−2, line widths of the low temperature photoluminescence near band gap recombination peaks below 1 meV, and deep electron trap concentration below 1014 cm−3 (compared with mid 1015 cm−3 in standard GaN). Numerous modifications of the ELO process have been proposed either to avoid technological steps (maskless ELO) or to improve it (pendeoepitaxy, PE). To further reduce the TD density, multiple-step-ELO and pendeo have also been implemented.However, even ELO quality GaN is not good enough for the next generation of LDs. ELO samples do not yet offer a full surface suitable for laser technology. What is needed for LDs with at least 30 mW output power is high quality freestanding GaN with TDs close to or even below 106 cm−2. To reach this crystalline perfection, elaborate technologies are currently being implemented. They, at some stage, involve TD reduction mechanisms occurring in the ELO process.Self-supported GaN with at least ELO quality at an affordable cost is believed to be the next breakthrough in GaN technology.

Gallium nitride material devices and methods of forming the same

Abstract: The invention provides gallium nitride material devices, structures and methods of forming the same. The devices include a gallium nitride material formed over a substrate, such as silicon. Exemplary devices include light emitting devices (e.g., LED's, lasers), light detecting devices (such as detectors and sensors), power rectifier diodes and FETs (e.g., HFETs), amongst others.

Comparison of Wide-Bandgap Semiconductors for Power Electronics Applications

Abstract: Recent developmental advances have allowed silicon (Si) semiconductor technology to approach the theoretical limits of the Si material; however, power device requirements for many applications are at a point that the present Si-based power devices cannot handle. The requirements include higher blocking voltages, switching frequencies, efficiency, and reliability. To overcome these limitations, new semiconductor materials for power device applications are needed. For high power requirements, wide-bandgap semiconductors like silicon carbide (SiC), gallium nitride (GaN), and diamond, with their superior electrical properties, are likely candidates to replace Si in the near future. This report compares wide-bandgap semiconductors with respect to their promise and applicability for power applications and predicts the future of power device semiconductor materials.

A temperature-dependent nonlinear analytic model for AlGaN-GaN HEMTs on SiC

Abstract: A temperature-dependent large-signal model for continuous-wave (CW) and pulsed-mode operation is presented and applied to aluminum gallium nitride, gallium nitride (AlGaN-GaN) high electron-mobility transistors (HEMTs) on silicon-carbide (SiC) substrates. The model includes thermal, RF dispersion, and bias-dependent capacitance model elements, and is suitable for application with a harmonic-balance simulator. Temperature- and bias-dependent on-wafer pulsed I-V and S-parameter measurements from 27/spl deg/C to 200/spl deg/C are used to examine trapping and thermal effects, and to determine temperature- and bias-dependent parameterized model coefficients for the nonlinear model. Large-signal measurement and model results are presented for 2 /spl times/ 0.35 /spl mu/m /spl times/ 125 /spl mu/m and 12 /spl times/ 0.35 /spl mu/m /spl times/ 125 /spl mu/m GaN HEMTs fabricated on SiC. The nonlinear model shows good agreement with measured CW power sweep data at an elevated temperature of 150/spl deg/C under more than 5-W power dissipation, and with measured pulsed load-pull data.

Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates, and gallium nitride semiconductor structures fabricated thereby

Abstract: More specifically, gallium nitride semiconductor layers may be fabricated by etching an underlying gallium nitride layer on a sapphire substrate, to define at least one post in the underlying gallium nitride layer and at least one trench in the underlying gallium nitride layer. The at least one post includes a gallium nitride top and a gallium nitride sidewall. The at least one trench includes a trench floor. The gallium nitride sidewalls are laterally grown into the at least one trench, to thereby form a gallium nitride semiconductor layer. However, prior to performing the laterally growing step, the sapphire substrate and/or the underlying gallium nitride layer is treated to prevent growth of gallium nitride from the trench floor from interfering with the lateral growth of the gallium nitride sidewalls of the at least one post into the at least one trench. Embodiments of gallium nitride semiconductor structures according to the present invention can include a sapphire substrate and an underlying gallium nitride layer on the sapphire substrate. The underlying gallium nitride layer includes therein at least one post and at least one trench. The at least one post each includes a gallium nitride top and a gallium nitride sidewall. The at least one trench includes a sapphire floor. A lateral gallium nitride layer extends laterally from the gallium nitride sidewall of the at least one post into the at least one trench. In a preferred embodiment, the at least one trench extends into the sapphire substrate such that the at least one post each includes a gallium nitride top, a gallium nitride sidewall and a sapphire sidewall and the at least one trench includes a sapphire floor. The sapphire floor preferably is free of a vertical gallium nitride layer thereon and the sapphire sidewall height to sapphire floor width ratio preferably exceeds about ¼. A mask may be included on the sapphire floor and an aluminum nitride buffer layer also may be included between the sapphire substrate and the underlying gallium nitride layer. A mask also may be included on the gallium nitride top. The mask on the floor and the mask on the top preferably comprise same material.

Nonlinear device model of microwave power GaN HEMTs for high power-amplifier design

Abstract: This paper presents a nonlinear equivalent circuit model of microwave power GaN high electron-mobility transistors (HEMTs), amenable for integration into commercial harmonic balance or transient simulators. All the steps taken to extract its parameter set are explained, from the extrinsic linear elements up to the intrinsic nonlinear ones. The predictive model capabilities are illustrated with measured and simulated output power and intermodulation-distortion data of a GaN HEMT. The model is then fully validated in a real application environment by comparing experimental and simulated results of output power, power-added efficiency, and nonlinear distortion obtained from a power amplifier.

Thermal resistance calculation of AlGaN-GaN devices

Abstract: We present an original accurate closed-form expression for the thermal resistance of a multifinger AlGaN-GaN high electron-mobility transistor (HEMT) device on a variety of host substrates including SiC, Si, and sapphire, as well as the case of a single-crystal GaN wafer. The model takes into account the thickness of GaN and host substrate layers, the gate pitch, length, width, and thermal conductivity of GaN, and host substrate. The model's validity is verified by comparing it with experimental observations. In addition, the model compares favorably with the results of numerical simulations for many different devices; very close (1%-2%) agreement is observed. Having an analytical expression for the channel temperature is of great importance for designers of power devices and monolithic microwave integrated circuits. In addition, it facilitates a number of investigations that are not practical or possible using time-consuming numerical simulations. The closed-form expression facilitates the concurrent optimization of electrical and thermal properties using standard computer-aided design tools.

SELECTIVE IMPLEMENTATION OF BARRIER LAYERS TO ACHIEVE THRESHOLD VOLTAGE CONTROL IN CMOS DEVICE FABRICATION WITH HIGH-k DIELECTRICS

Abstract: The present invention provides a semiconductor structure including a semiconductor substrate having a plurality of source and drain diffusion regions located therein, each pair of source and drain diffusion regions are separated by a device channel. The structure further includes a first gate stack of pFET device located on top of some of the device channels, the first gate stack including a high-k gate dielectric, an insulating interlayer abutting the gate dielectric and a fully silicided metal gate electrode abutting the insulating interlayer, the insulating interlayer includes an insulating metal nitride that stabilizes threshold voltage and flatband voltage of the p-FET device to a targeted value and is one of aluminum oxynitride, boron nitride, boron oxynitride, gallium nitride, gallium oxynitride, indium nitride and indium oxynitride. A second gate stack of an nFET devices is located on top remaining device channels, the second gate stack including a high-k gate dielectric and a fully silicided gate electrode located directly atop the high-k gate dielectric.

12 W/mm power density AlGaN/GaN HEMTs on sapphire substrate

Abstract: Record power performance at 4 GHz has been obtained using field-plated AlGaN/GaN HEMTs on sapphire substrate. High power density (12 W/mm) as well as high efficiency (58%) have been measured. A comparison between devices with and without field plate on the same sample showed a significant reduction in knee-voltage walk-out for the field-plated device, thus enabling high power and efficiency operation.

Gallium nitride type semiconductor laser device

Abstract: A gallium nitride type semiconductor laser device includes: a substrate; and a layered structure formed on the substrate. The layered structure at least includes an active layer of a nitride type semiconductor material which is interposed between a pair of nitride type semiconductor layers each functioning as a cladding layer or a guide layer. A current is injected into a stripe region in the layered structure having a width smaller than a width of the active layer. The width of the stripe region is in a range between about 0.2 μm and about 1.8 μm.

Semi-insulating GaN and method of making the same

Abstract: Large-area, single crystal semi-insulating gallium nitride that is usefully employed to form substrates for fabricating GaN devices for electronic and/or optoelectronic applications. The large-area, semi-insulating gallium nitride is readily formed by doping the growing gallium nitride material during growth thereof with a deep acceptor dopant species, e.g., Mn, Fe, Co, Ni, Cu, etc., to compensate donor species in the gallium nitride, and impart semi-insulating character to the gallium nitride.

Large area, uniformly low dislocation density gan substrate and process for making the same

Abstract: Large area, uniformly low dislocation density single crystal III-V nitride material, e.g., gallium nitride having a large area of greater than 15 cm, a thickness of at least 1 mm, an average dislocation density not exceeding 5E5 cm-2, and a dislocation density standard deviation ratio of less than 25%. Such material can be formed on a substrate by a process including (i) a first phase of growing the III-V nitride material on the substrate under pitted growth conditions, e.g., forming pits over at least 50% of the growth surface of the III-V nitride material, wherein the pit density on the growth surface is at least 102 pits/cm2 of the growth surface, and (ii) a second phase of growing the III-V nitride material under pit-filling conditions.

Power performance of AlGaN-GaN HEMTs grown on SiC by plasma-assisted MBE

Abstract: We report AlGaN-GaN high electron mobility transistors (HEMTs) grown by molecular beam epitaxy (MBE) on SiC substrates with excellent microwave power and efficiency performance. The GaN buffers in these samples were doped with carbon to make them insulating. To reduce gate leakage, a thin silicon nitride film was deposited on the AlGaN surface by chemical vapor deposition. At 4 GHz, an output power density of 6.6 W/mm was obtained with 57% power-added efficiency (PAE) and a gain of 10 dB at a drain bias of 35 V. This is the highest PAE reported until now at 4 GHz in AlGaN-GaN HEMTs grown by MBE. At 10 GHz, we measured an output power density of 7.3 W/mm with a PAE of 36% and gain of 7.6 dB at 40-V drain bias.

Dislocation- and crystallographic-dependent photoelectrochemical wet etching of gallium nitride

Abstract: Polarity and dislocation dependence study of photoelectrochemical wet etching on GaN was carried out on lateral epitaxial overgrown nonpolar (1120)a-GaN/(1102)r-plane sapphire substrate. This LEO nonpolar GaN sample has low dislocation density Ga- and N-faces exposed horizontally in opposite directions, which can be exposed to identical etching conditions for both polarity and dislocation dependence study. It is observed that N-face GaN is essentially much chemically active than Ga-face GaN, which shows the hexagonal pyramids with {1011} facets on the etched N face. No obvious etching was observed on Ga face in the same etch condition. As for dislocation dependence, the “wing” (low dislocation density) region was etched faster than the “window” (high dislocation density) region. Smooth etched surfaces were formed with the (1122) facet as an etch stop plane both on Ga and N-wing region.

9.4-W/mm power density AlGaN-GaN HEMTs on free-standing GaN substrates

Abstract: High power microwave AlGaN-GaN high electron-mobility transistors (HEMTs) on free-standing GaN substrates are demonstrated for the first time. Measured gate leakage was -2.2 /spl mu/A/mm at -20 V and -10 /spl mu/A/mm at -45 V gate bias. When operated at a drain bias of 50 V, devices showed a record continuous-wave output power density of 9.4 W/mm at 10 GHz with an associated power-added efficiency of 40%. Long-term stability of device RF operation was also examined. Under room conditions, devices driven at 25 V and 3-dB gain compression remained stable in 200 h, degrading only by 0.18 dB in output power. Such results illustrate the potential of GaN substrate technology in supporting reliable, high performance AlGaN-GaN HEMTs for microwave power applications.

Effect of the polar surface on GaN nanostructure morphology and growth orientation

Abstract: Wurtzite gallium nitride nanostructures were grown by thermal reaction of gallium oxide and ammonia. The resulting morphology varied depending on ammonia flow rate. At 75sccm only nanowires were obtained, while polyhedral crystals and nanobelts were observed at 175sccm. Scanning electron microscopy and transmission electron microscopy revealed both thin smooth and thick corrugated nanowires. The growth orientations of most of the smooth ones, as well as the nanobelts, were perpendicular to the c axis (⟨0001⟩), while the corrugated nanowires and the large polyhedra grew parallel to ⟨0001⟩. We propose a model to explain these variations of morphology and growth orientation in terms of the Ga∕N ratio and the different characteristic length of {0001} polar surface in the different nanostructures.

New solvothermal routes for GaN nanocrystals

Abstract: GaN nanocrystals (see Figure) of hexagonal structure and varying diameters have been prepared by the reaction of hexamethyldisilazane (HMDS) with gallium cupferron or GaCl 3 under solvothermal conditions. The nanocrystals show a size-dependent photoluminescence band in the 260-320 nm region, characteristic of quantum confinement.

Lattice damage produced in GaN by swift heavy ions

Abstract: Wurtzite GaN epilayers bombarded at 300 K with 200 MeV Au-197(16+) ions are studied by a combination of transmission electron microscopy (TEM) and Rutherford backscattering/channeling spectrometry (RBS/C). Results reveal the formation of near-continuous tracks propagating throughout the entire similar to1.5-mum-thick GaN film. These tracks, similar to100 Angstrom in diameter, exhibit a large degree of structural disordering but do not appear to be amorphous. Throughout the bombarded epilayer, high-resolution TEM reveals planar defects which are parallel to the basal plane of the GaN film. The gross level of lattice disorder, as measured by RBS/C, gradually increases with increasing ion fluence up to similar to10(13) cm(-2). For larger fluences, delamination of the nitride film from the sapphire substrate occurs. Based on these results, physical mechanisms of the formation of lattice disorder in GaN in such a high electronic stopping power regime are discussed. (C) 2004 American Institute of Physics.

High breakdown Voltage undoped AlGaN-GaN power HEMT on sapphire substrate and its demonstration for DC-DC converter application

Abstract: Undoped AlGaN-GaN power high electron mobility transistors (HEMTs) on sapphire substrate with 470-V breakdown voltage were fabricated and demonstrated as a main switching device for a high-voltage dc-dc converter. The fabricated power HEMT realized a high breakdown voltage with a field plate structure and a low on-state resistance of 3.9 m/spl Omega//spl middot/cm/sup 2/, which is 10 /spl times/ lower than that of conventional Si MOSFETs. The dc-dc converter operation of a down chopper circuit was demonstrated using the fabricated device at the input voltage of 300 V. These results show the promising possibilities of the AlGaN-GaN power HEMTs on sapphire substrate for future switching power devices.

Homoepitaxial gallium nitride based photodetector and method of producing

Abstract: A photodetector ( 100, 200, 300 ) comprising a gallium nitride substrate, at least one active layer ( 104, 302 ) disposed on the substrate ( 102, 202, 306 ), and a conductive contact structure ( 106, 210, 308 ) affixed to the active layer ( 104, 302 ) and, in some embodiments, the substrate ( 102, 202, 306 ). The invention includes photodetectors ( 100, 200, 300 ) having metal-semiconductor-metal structures, P-i-N structures, and Schottky-barrier structures. The active layers ( 104, 302 ) may comprise Ga 1-x-y Al x In y N 1-z-w P z As w , or, preferably, Ga 1-x Al x N. The gallium nitride substrate comprises a single crystal gallium nitride wafer and has a dislocation density of less than about 10 5 cm −2 . A method of making the photodetector ( 100, 200, 300 ) is also disclosed.

High brightness gallium nitride-based light emitting diode with transparent conducting oxide spreading layer

Abstract: A new transparent conducting oxide (TCO), which can be expressed as Al x Ga 3-x-y In 5+y Sn 2-z O 16-2z ; 0≦x<1, 0

Gallium nitride nanowires with a metal initiated metal-organic chemical vapor deposition (MOCVD) approach

Abstract: We have studied structural and electrical properties of one dimensionally grown single crystalline gallium nitride (GaN) nanowires (NWs) for nanoscale devices using a metal-initiated metal-organic chemical vapor deposition (MOCVD). GaN nanowires were formed via the vapor-liquid-solid (VLS) mechanism with gold, iron, or nickel as growth initiators and were found to have triangular cross-sections with widths of 15 ∼ 200 nm and lengths of 5 ∼ 20 μm. TEM confirmed that the nanowires were single crystalline and were well oriented along the [210] or [110] direction on substrate depending on the metal initiators. For electrical transport properties of un-doped GaN nanowires, the back-gated field effect transistors (FET) were also fabricated by standard e-beam lithography. In our electrical measurement, the carrier concentration and mobility were 2 ∼ 4 × 10 18 cm -3 and 60 ∼ 70 cm2/V s, respectively.

GaN/AlGaN/GaN DISPERSION-FREE HIGH ELECTRON MOBILITY TRANSISTORS

Abstract: A dispersion-free high electron mobility transistor (HEMT), comprised of a substrate; a semi-insulating buffer layer, comprised of gallium nitride (GaN) or aluminum gallium nitride (A1GaN), deposited on the substrate, an A1GaN barrier layer, with an aluminum (Al) mole fraction larger than that of the semi-insulating buffer layer, deposited on the semi-insulating buffer layer, an n-type doped graded A1GaN layer deposited on the A1GaN barrier layer, wherein an Al mole fraction is decreased from a bottom of the n-type doped graded A1GaN layer to a top of the n-type doped graded A1GaN layer, and a cap layer, comprised of GaN or A1GaN with an Al mole fraction smaller than that of the A1GaN barrier layer, deposited on the n-type doped graded A1GaN layer.