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Showing papers on "Gallium nitride published in 2022"


Journal ArticleDOI
TL;DR: In this article , the authors investigated the failure and degradation of GaN HEMTs in single-event and repetitive unclamped inductive switching (UIS) tests and provided new insights into the surge-energy and overvoltage robustness of cascode GaNHEMTs.
Abstract: Surge-energy robustness is essential for power devices in many applications such as automotive powertrains and electricity grids. While Si and SiC mosfet s can dissipate surge energy via avalanche, the GaN high-electron-mobility transistor (HEMT) has no avalanche capability and withstands surge energy by its overvoltage capability. However, a comprehensive study into the surge-energy robustness of the cascode GaN HEMT, a composite device made of a GaN HEMT and an Si mosfet , is still lacking. This article fills this gap by investigating the failure and degradation of 650-V-rated cascode GaN HEMTs in single-event and repetitive unclamped inductive switching (UIS) tests. The cascode was found to withstand surge energy by the overvoltage capability of the GaN HEMT, accompanied by avalanche in the Si mosfet . In single-event UIS tests, the cascode failed in the GaN HEMT at a peak overvoltage of 1.4–1.7 kV, which is statistically lower than the device's static breakdown voltage (1.8–2.2 kV). In repetitive UIS tests, the device failure boundary was found to be frequency dependent. At 100 kHz, the failure boundary (∼1.3 kV) is even lower than the single-event UIS boundary. After 1 million cycles of 1.25-kV UIS stresses, devices show large but recoverable parametric shifts. All these failure and degradation behaviors can be explained by the buffer trapping in the GaN HEMT and the resulted change in its dynamic breakdown voltage. Moreover, the GaN buffer trapping is believed to be assisted by the Si mosfet avalanche. An analytical model was also developed to extract the charges and losses produced in the Si avalanche in a UIS cycle. These results provide new insights into the surge-energy and overvoltage robustness of cascode GaN HEMTs.

29 citations


Journal ArticleDOI
TL;DR: In this article , a blue InGaN/GaN multiple quantum well (MQW) nanorod-LED (nLED) with high external quantum efficiency (EQE) was presented.
Abstract: Indium gallium nitride (InGaN)-based micro-LEDs (μLEDs) are suitable for meeting ever-increasing demands for high-performance displays owing to their high efficiency, brightness and stability1-5. However, μLEDs have a large problem in that the external quantum efficiency (EQE) decreases with the size reduction6-9. Here we demonstrate a blue InGaN/GaN multiple quantum well (MQW) nanorod-LED (nLED) with high EQE. To overcome the size-dependent EQE reduction problem8,9, we studied the interaction between the GaN surface and the sidewall passivation layer through various analyses. Minimizing the point defects created during the passivation process is crucial to manufacturing high-performance nLEDs. Notably, the sol-gel method is advantageous for the passivation because SiO2 nanoparticles are adsorbed on the GaN surface, thereby minimizing its atomic interactions. The fabricated nLEDs showed an EQE of 20.2 ± 0.6%, the highest EQE value ever reported for the LED in the nanoscale. This work opens the way for manufacturing self-emissive nLED displays that can become an enabling technology for next-generation displays.

27 citations


Journal ArticleDOI
TL;DR: In this paper , the main factors and mechanisms that limit the reliability of gallium nitride (GaN)-based light-emitting diodes (LEDs) are reviewed.
Abstract: Herein, the main factors and mechanisms that limit the reliability of gallium nitride (GaN)‐based light‐emitting diodes (LEDs) are reviewed. An overview of the defects characterization techniques most relevant for wide‐bandgap diodes is provided first. Then, by introducing a catalogue of traps and deep levels in GaN and computer‐aided simulations, it is shown which types of defects are more detrimental for the radiative efficiency of the devices. Gradual degradation mechanisms are analyzed in terms of their specific driving force: a separate analysis of recombination‐enhanced processes, driven by nonradiative recombination and/or temperature‐assisted processes, such as defects or impurity diffusion, is presented. The most common lifetime estimation methods and standards adopted for solid‐state luminaires are also reported on. Finally, the paper concludes by examining which are the typical degradation and failure mechanisms exhibited by LEDs submitted to electrical overstress.

24 citations


Journal ArticleDOI
TL;DR: In this paper , the growth and fabrication methods used to develop a large area (1 mm2) vertical GaN p-n diode capable of a 6.0-kV breakdown were described.
Abstract: Vertical gallium nitride (GaN) p-n diodes have garnered significant interest for use in power electronics where high-voltage blocking and high-power efficiency are of concern. In this article, we detail the growth and fabrication methods used to develop a large area (1 mm2) vertical GaN p-n diode capable of a 6.0-kV breakdown. We also demonstrate a large area diode with a forward pulsed current of 3.5 A, an 8.3- $\text{m}\boldsymbol \Omega \cdot {\text{cm}}^{2}$ differential specific ON-resistance, and a 5.3-kV reverse breakdown. In addition, we report on a smaller area diode (0.063 mm2) that is capable of 6.4-kV breakdown with a differential specific ON-resistance of 10.2 $\text{m}\boldsymbol \Omega \cdot {\text{cm}}^{2}$ , when accounting for current spreading through the drift region at a 45° angle. Finally, the demonstration of avalanche breakdown is shown for a 0.063-mm2 diode with a room temperature breakdown of 5.6 kV. These results were achieved via epitaxial growth of a 50- $ \mu \text{m}$ drift region with a very low carrier concentration of $< 1\times10$ 15 cm−3 and a carefully designed four-zone junction termination extension.

22 citations


Journal ArticleDOI
TL;DR: In this paper , the authors demonstrate that the avalanche current in GaN JFETs can be tuned to flow through the source, by using either a mosfet driver with a large gate resistance or an RC-interface driver.
Abstract: The 1.2-kV vertical gallium nitride (GaN) fin-channel junction-gate field-effect transistor (JFET) has recently emerged as a promising candidate for power electronics. It is normally off and has a specific on-resistance smaller than that of 1.2-kV SiC mosfets. A robust avalanche capability has also been reported in vertical GaN JFETs with an avalanche current flowing through the gate. This avalanche path differs from that of power mosfets (via the source) and may pose challenges in gate driver reliability. This article, for the first time, demonstrates that the avalanche current in GaN JFETs can be tuned to flow through the source, by using either a mosfet driver with a large gate resistance or an RC-interface driver. These drivers turn on the fin channel during the device avalanche and obviate a large avalanche current into the gate driver. The carrier dynamics within the GaN JFET under the two avalanche paths have been unveiled by physics-based mixed-mode electrothermal simulations. The critical avalanche energy density in both paths was found to be comparable with the state-of-the-art SiC mosfets. Additionally, the RC-interface driver was shown to outperform the mosfet driver for vertical GaN JFETs. The learning about normally off GaN JFETs was applied to a study of commercial normally on SiC JFETs. Two avalanche paths of a similar nature were observed with different gate drivers. This article provides new insights of the JFET avalanche and show the excellent robustness of the novel 1.2 kV vertical GaN JFET.

22 citations


Journal ArticleDOI
TL;DR: In this article, the authors proposed an integration scheme for the high-voltage lateral gallium nitride high electron mobility transistors (GaN HEMTs) dies without bonding wires.
Abstract: Compared with silicon and silicon carbide devices, the unique electrical and structural characteristics of gallium nitride high electron mobility transistors (GaN HEMTs) make them have different requirements for power module integration. This article proposes a novel integration scheme for the high-voltage lateral GaN HEMT dies without bonding wires. Based on the proposed integration scheme, a compact 650 V/30 A GaN power module with low parasitic parameters and high thermal performance is designed. The GaN dies are sandwiched between two ceramic substrates to improve thermal performance and ensure consistent thermal expansion coefficients. The multiple copper layer structure is used to increase wiring flexibility to reduce parasitic parameters. The design of gate and power loop layouts is discussed, and the common-mode (CM) capacitance is optimized. A comprehensive reliability evaluation is also carried out for this integration scheme. Finally, a double-sided cooling 650 V/30 A full-bridge GaN power module with 2.4 cm×1.3 cm×0.17 cm is fabricated. The thermal resistance is reduced by 30%–48% compared with the conventional single-sided cooling module. The power loop and gate loop inductances are reduced to 0.94 nH and 2 nH, respectively, and the CM capacitance is limited to 2.5 pF. The maximum d v /d t of the drain–source voltage is high as 150 V/ns with only 10% overshoot. Based on the power module, a 3.3-kW two-phase interleaved buck converter is developed. It has 820 W/in3 power density and 98.85% peak efficiency.

19 citations


Journal ArticleDOI
TL;DR: In this article , the epitaxy and performance characteristics of N-polar InGaN nanowire LEDs grown on sapphire substrate by plasma assisted molecular beam epitaxy were studied.
Abstract: The efficiency of conventional quantum well light-emitting diodes (LEDs) decreases drastically with reducing areal size. Here we show that such a critical size scaling issue of LEDs can be addressed by utilizing N-polar InGaN nanowires. We studied the epitaxy and performance characteristics of N-polar InGaN nanowire LEDs grown on sapphire substrate by plasma-assisted molecular beam epitaxy. A maximum external quantum efficiency ∼11% was measured for LEDs with lateral dimensions as small as 750 nm directly on wafer without any packaging. The effect of electron overflow and Auger recombination on the device performance is also studied. This work provides a viable approach for achieving high-efficiency nano and micro LEDs that were not previously possible.

19 citations


Journal ArticleDOI
TL;DR: In this article , the authors critically reviewed the issues that need to be addressed while transferring GaN or AlGaN channel HEMTs on Si-wafers, and highlighted the popular architectures of GaN and Al-GaN channels on SiWafers as well as techniques for enhancing their breakdown performance.

17 citations


Journal ArticleDOI
TL;DR: In this article , the key challenges and the recent breakthroughs in realizing high-quality indium (In)-rich indium gallium nitride (InGaN) epilayers and InGaN/GaN multiple quantum wells (QWs) by using the metal-organic chemical vapor deposition (MOCVD) technique are discussed.

16 citations


Journal ArticleDOI
TL;DR: In this paper , a self-powered photoelectrochemical (PEC) UV photodetectors based on gallium nitride/cesium lead bromide (GaN/CsPbBr3) core-shell nanowire (NW) heterojunctions are formed efficiently by introducing the CsPb-Br3 quantum dots (QDs) with cubic phase onto the GaN NW surfaces.

14 citations


Journal ArticleDOI
TL;DR: In this article , a spin-on-glass (SOG) based field plate (FP) was placed on top of the hydrogen-plasma passivated p GaN layer to achieve better electric field management.
Abstract: A novel edge termination method resulting in an avalanche-capable 2.8 kV vertical gallium nitride (GaN) pn diode is reported. A low transition temperature spin-on-glass (SOG) based field plate (FP) was deposited on top of the hydrogen-plasma passivated p GaN layer to achieve better electric field management. The hydrogen plasma treatment along with the field plate offered an edge termination without mesa etch that was able to mitigate the peak electric fields in the diodes. Avalanche was confirmed by the positive temperature coefficient of the breakdown voltage. Without the field plate, the breakdown voltage was recorded between 1.3 to 2.1 kV, without an avalanche behavior. The fabricated diodes exhibited a good rectifying behavior with an on-off ratio of $10^{{9}}$ and a specific resistance of 1.65 $\text{m}\Omega \cdot $ cm2. This work demonstrated the avalanche capability with the combination of FP and hydrogen-plasma based termination in GaN vertical pn diodes, showing a high figure-of-merit of 4.8 GW/cm2.

Journal ArticleDOI
01 Jun 2022-Vacuum
TL;DR: In this article , the effect of ion-beam-induced defect formation and physical characteristics of wide and ultra-wide bandgap semiconductors are studied and the mechanisms of ion induced defect formation are not well-studied and understood.

Journal ArticleDOI
TL;DR: In this article , the authors compared the performance of three types of commercial GaN power switching devices, including Schottky gate p-GaN high electron mobility transistor (HEMT), ohmic gate pGaN HEMT with hybrid drain, and Cascode GaN device, under single-pulse and repetitive unclamp-inductive-switching (UIS) conditions.
Abstract: This article makes the comparisons on the behaviors of three types of commercial GaN power switching devices, including Schottky gate p-GaN high electron mobility transistor (HEMT), ohmic gate p-GaN HEMT with hybrid drain, and Cascode GaN device, under single-pulse and repetitive unclamp-inductive-switching (UIS) conditions by experiments and simulations. It shows that all the three types of GaN devices withstand the UIS stress by storing energy in parasitic capacitances rather than by avalanche process, which is a different phenomenon compared with traditional Si/SiC devices. However, the failure phenomena under single-pulse UIS condition are different. For the two types of p-GaN gate devices, the inverse-piezoelectric induced punch-through makes the burnout under drain contact region. For the Cascode device, the breakdown of the inner Si device dominates the failure. As for the behaviors under repetitive UIS stresses, p-GaN gate device with hybrid drain performs the best, Schottky gate p-GaN HEMT shows the most serious electrical performance degradations due to the trapping effects and carrier storage phenomena, Cascode GaN device exhibits stable threshold voltage and acceptable degradations of on -state resistance due to the existence of inner Si device.

Journal ArticleDOI
TL;DR: In this paper , the authors proposed simple models for dead time optimization in a gallium nitride (GaN) based buck converter under different load conditions, which can be extended for other GaN-based dc-dc converters.
Abstract: A gallium nitride (GaN) field effect transistor can provide superior performance over a Si- mosfet due to its low on -state resistance and low junction capacitances. However, a GaN-based converter exhibits higher dead time loss during reverse conduction. Thus, to improve the efficiency, dead time optimization is required. This article proposes simple models for dead time optimization in a GaN-based buck converter under different load conditions. The proposed models are analytical in nature compared to the conventional models available for Si-based converters. A buck converter prototype is designed using a 100 V GaN device (GS61008P from GaN Systems) and the proposed analytical model-based dead time optimization techniques are validated experimentally. The proposed modeling techniques can be extended for other GaN-based dc–dc converters.

Journal ArticleDOI
03 Dec 2022-Energies
TL;DR: In this paper , the authors present a review of popular SiC and GaN power devices, discusses the associated merits and challenges, and finally their applications in power electronics. But they do not discuss the potential of GaN and SiC power devices in terms of energy efficiency.
Abstract: Power electronic systems have a great impact on modern society. Their applications target a more sustainable future by minimizing the negative impacts of industrialization on the environment, such as global warming effects and greenhouse gas emission. Power devices based on wide band gap (WBG) material have the potential to deliver a paradigm shift in regard to energy efficiency and working with respect to the devices based on mature silicon (Si). Gallium nitride (GaN) and silicon carbide (SiC) have been treated as one of the most promising WBG materials that allow the performance limits of matured Si switching devices to be significantly exceeded. WBG-based power devices enable fast switching with lower power losses at higher switching frequency and hence, allow the development of high power density and high efficiency power converters. This paper reviews popular SiC and GaN power devices, discusses the associated merits and challenges, and finally their applications in power electronics.

Journal ArticleDOI
TL;DR: In this paper, a bright and stable blue gallium nitride (GaN) LED is utilized for vertical integration with a green MAPbBr3 PeLED, successfully achieving a Pe•GaN tandem LED with independently tunable luminance and color.
Abstract: Tandem structures with different subpixels are promising for perovskite‐based multicolor electroluminescence (EL) devices in ultra‐high‐resolution full‐color displays; however, realizing excellent luminance‐ and color‐independent tunability considering the low brightness and stability of blue perovskite light‐emitting diodes (PeLEDs) remains a challenge. Herein, a bright and stable blue gallium nitride (GaN) LED is utilized for vertical integration with a green MAPbBr3 PeLED, successfully achieving a Pe‐GaN tandem LED with independently tunable luminance and color. The electronic and photonic co‐excitation (EPCE) effect is found to suppress the radiative recombination and current injection of PeLEDs, leading to degraded luminance and current efficiency under direct current modulation. Accordingly, the pulse‐width modulation is introduced to the tandem device with a negligible EPCE effect, and the average hybrid current efficiency is significantly improved by 139.5%, finally achieving a record tunable luminance (average tuning range of 16631 cd m−2 at an arbitrary color from blue to green) for perovskite‐based multi‐color LEDs. The reported excellent independent tunability can be the starting point for perovskite‐based multicolor EL devices, enabling the combination with matured semiconductor technologies to facilitate their commercialization in advanced display applications with ultra‐high resolution.

Journal ArticleDOI
TL;DR: In this paper , a monolithic voltage reference based on aluminum-gallium- nitride/galliumnitride (AlGaN/GaN) Metal-Insulator-Semiconductor (MIS) High-Electron-Mobility Transistors (HEMTs) is presented.
Abstract: This letter demonstrates a monolithic voltage reference based on technology of aluminum-gallium- nitride/gallium-nitride (AlGaN/GaN) Metal-Insulator- Semiconductor (MIS) High-Electron-Mobility Transistors (HEMTs). The simple but robust voltage reference consists of only two transistors (2T), namely a depletion-mode (D-mode) device and an enhancement-mode (E-mode) device. This implementation features a 2T structure to generate a predictable reference voltage while maintaining high stability over wide ranges of the supply voltage and temperature. Experimental results show a realization of 2.53 V reference voltage ( $\text{V}_{REF}$ ) for a supply voltage range of 4.8 to 50 V, a maximum $\text{V}_{REF}$ line sensitivity of 0.077 % $/\text{V}$ and a temperature coefficient of 26.2~33.9 ppm/°C in the temperature range from −25 to 250 °C. The voltage reference circuit also features a fast initialization with a start-up time of 387 ns at 25 °C and 841 ns at 250 °C. The results demonstrate a useful design and implementation of a thermally stable reference voltage for applications in biasing and sensing circuits to achieve the compact all-GaN monolithic integration of control/protection blocks in the smart power systems.

Journal ArticleDOI
TL;DR: In this article , a face-up integrated power module based on the printed circuit board embedding technology is presented to tackle the challenges caused by the conventional discrete solutions in high frequency high power density converters.
Abstract: To fully take the high-frequency advantage of gallium nitride (GaN) devices, this article presents a face-up integrated power module based on the printed circuit board embedding technology to tackle the challenges caused by the conventional discrete solutions. The proposed GaN module highly integrates a GaN-bare-dies-based full bridge, driving circuits, and decoupling capacitors, in which the advanced bismaleimide-triazine material is used as the packaging material and the copper-filled laser microvias are used for low-parasitic-inductance and high-thermal-conductivity interconnection. Careful electro-thermal codesign and optimization of power loop is conducted to make the tradeoff between power loop inductance and thermal performance. The proposed full bridge power module achieves the lowest power loop inductance of about 0.305 nH in power modules with the same power level. The maximum thermal resistances from the embedded GaN bare dies to top and bottom surface are 3.39 and 0.42 °C/W, respectively. Benefitting from the ultralow power loop parasitic inductances, the switching speed of GaN devices reaches to 57.5 V/ns, while the voltage overshoot is not higher than 5.35% of the dc bus voltage. The superior performance of the proposed integrated GaN module makes it a promising application prospect in high frequency high power density converters.

Journal ArticleDOI
TL;DR: In this article , a broadband fully integrated Doherty power amplifier (DPA) using a continuous-mode combining load is presented, which can be realized using lumped components in gallium nitride (GaN) monolithic microwave integrated circuits.
Abstract: This article presents a broadband fully integrated Doherty power amplifier (DPA) using a continuous-mode combining load. It is illustrated that the continuous-mode impedance condition in back-off and saturation for Doherty operation can be achieved with a simple impedance inverter network (IIN) that can be realized using lumped components in gallium nitride (GaN) monolithic microwave integrated circuits (MMICs). A DPA was designed and fabricated using the 250-nm GaN process to validate the proposed architecture and design methodology. The fabricated DPA chip attains around 8 W saturated power from 4.1 to 5.6 GHz. About 38.5%–46.5% drain efficiencies are achieved at 6-dB output power back-off within the entire design band. When driven by a 100-MHz OFDM signal with 6.5-dB peak-to-average power ratio (PAPR), the proposed DPA achieves better than −45-dBc adjacent channel leakage ratio (ACLR) and higher than 38% average efficiency at 4.4 and 5.2 GHz after digital predistortion.

Journal ArticleDOI
TL;DR: In this paper, a copper (Cu) cation substituted GaN (Cu-GaN) nanowires were fabricated to understand the electronically engineered electrochemical performance for Li ion storage.

Journal ArticleDOI
20 Jul 2022-Energies
TL;DR: In this paper , a comparative analysis among four power MOSFET technologies: conventional Silicon (Si), Superjunction (SJ), Silicon Carbide (SiC) and Gallium Nitride (GaN), indicating the voltage, current and frequency ranges of the best performance for each technology.
Abstract: This work presents a comparative analysis among four power MOSFET technologies: conventional Silicon (Si), Superjunction (SJ), Silicon Carbide (SiC) and Gallium Nitride (GaN), indicating the voltage, current and frequency ranges of the best performance for each technology. For this, a database with 91 power MOSFETs from different manufacturers was built. MOSFET losses are related to individual characteristics of the technology: drain-source on-state resistance, input capacitance, Miller capacitance and internal gate resistance. The total losses are evaluated considering a drain-source voltage of 400 V, power levels from 1 kW to 16 kW (1 A–40 A) and frequencies from 1 kHz to 500 kHz. A methodology for selecting power MOSFETs in power electronics applications is also presented.

Journal ArticleDOI
TL;DR: In this paper , a comparative performance evaluation of state-of-the-art SiC and GaN 600/650V active switches is presented, where the minimum theoretical semiconductor losses under hard-switching operation is introduced.
Abstract: The drive inverter represents a central component of an electric vehicle (EV) drive train, being responsible for the DC/AC power conversion between the battery and the electrical machine. In this context, novel converter topologies adopting modern 600/650V wide bandgap (WBG) semiconductor devices will play a crucial role in improving the performance of next-generation drive inverters. In fact, WBG devices theoretically allow to achieve both higher inverter power density and higher conversion efficiency with respect to conventional silicon (Si) IGBT based solutions. Even though silicon carbide (SiC) devices are already well established in the automotive industry, high-voltage gallium nitride (GaN) devices are rapidly entering the market, promising higher theoretical performance but featuring a lower degree of maturity. As a consequence, it is currently not clear which semiconductor technology is most suited for future EV drive inverters. Therefore, this paper aims to address this gap providing a comparative performance evaluation of state-of-the-art SiC and GaN 600/650V active switches. In particular, a novel figure-of-merit (FOM) representing the minimum theoretical semiconductor losses under hard-switching operation is introduced. Remarkably, this FOM enables a fair and accurate performance comparison among semiconductor devices, allowing to clearly determine the best performing technology for a given set of application-specific conditions. The results of the comparative assessment show that currently available SiC and GaN active switch technologies can outperform each other depending on the semiconductor operating temperature and the converter switching frequency.

Journal ArticleDOI
TL;DR: In this article , an overview of the state-of-the-art graphene-based transparent conductive electrodes in gallium nitride (GaN)-based light-emitting diodes (LEDs) is presented.
Abstract: Graphene combines high conductivity (sheet resistance down to a few hundred Ω/sq and even less) with high transparency (>90%) and thus exhibits a huge application potential as a transparent conductive electrode in gallium nitride (GaN)-based light-emitting diodes (LEDs), being an economical alternative to common indium-based solutions. Here, we present an overview of the state-of-the-art graphene-based transparent conductive electrodes in GaN-based LEDs. The focus is placed on the manufacturing progress and the resulting properties of the fabricated devices. Transferred as well as directly grown graphene layers are considered. We discuss the impact of graphene-based transparent conductive electrodes on current spreading and contact resistance, and reveal future challenges and perspectives on the use of graphene in GaN-based LEDs.

Journal ArticleDOI
10 Jan 2022-Micro
TL;DR: In this article , the main issues related to ion implantation doping technology for SiC and GaN electronic devices are briefly reviewed and some specific literature case studies are illustrated to describe the impact of the ion implantion doping conditions (annealing temperature, electrical activation and doping profiles, surface morphology, creation of interface states, etc.) on the electrical parameters of power devices.
Abstract: Wide band gap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) are excellent materials for the next generation of high-power and high-frequency electronic devices. In fact, their wide band gap (>3 eV) and high critical electric field (>2 MV/cm) enable superior performances to be obtained with respect to the traditional silicon devices. Hence, today, a variety of diodes and transistors based on SiC and GaN are already available in the market. For the fabrication of these electronic devices, selective doping is required to create either n-type or p-type regions with different functionalities and at different doping levels (typically in the range 1016–1020 cm−3). In this context, due to the low diffusion coefficient of the typical dopant species in SiC, and to the relatively low decomposition temperature of GaN (about 900 °C), ion implantation is the only practical way to achieve selective doping in these materials. In this paper, the main issues related to ion implantation doping technology for SiC and GaN electronic devices are briefly reviewed. In particular, some specific literature case studies are illustrated to describe the impact of the ion implantation doping conditions (annealing temperature, electrical activation and doping profiles, surface morphology, creation of interface states, etc.) on the electrical parameters of power devices. Similarities and differences in the application of ion implantation doping technology in the two materials are highlighted in this paper.

Journal ArticleDOI
TL;DR: In this article , a GaN half-bridge module integrating two 600 V/170 mΩ gallium nitride (GaN) high-electron mobility transistors with their gate drive stages and a fraction of the dc-link capacitance on a patterned multilayer polycrystalline AlN-substrate is presented.
Abstract: Power electronic systems employing wide-bandgap GaN transistors promise high efficiency operation and power density but require minimized parasitic circuit elements and an effective cooling concept. This article presents a half-bridge module integrating two 600 V/170 mΩ gallium nitride (GaN) high-electron mobility transistors with their gate drive stages and a fraction of the dc-link capacitance on a patterned multilayer polycrystalline AlN-substrate. The high-voltage isolation at a layer distance of 10 μm and a dense chip-by-chip integration on the GaN half-bridge module enable a compact lateral commutation loop design combined with improved cooling capability of the power transistors. Consequently, the GaN half-bridge module allows for higher load currents at lower device temperature while most parasitic circuit elements are reduced compared to a conventional printed circuit board (PCB) design. The parasitic circuit elements of the GaN half-bridge module and a reference four-layer PCB half-bridge are evaluated using 3D-FEM field simulation and in-circuit measurements. Selected finite element method (FEM) simulation results are validated by S-parameter measurements and further used to parametrize a lumped commutation loop model. The thermal characterization of the GaN half-bridge module validates the improved cooling capability of the GaN half-bridge power module. Transient switching characteristics are studied in hard-switching mode. The device temperature and converter efficiency are evaluated in dc/dc buck-converter operation.

Journal ArticleDOI
TL;DR: In this article , the authors review the recent progress of GaN multi-channel power devices and explore the promising perspective of the multichannel platform for future power devices, including multiple, vertically stacked 2DEG channels, showing much reduced resistances and excellent voltage blocking capabilities for a wide range of voltage classes from 1 to 10
Abstract: The outstanding properties of Gallium Nitride (GaN) have enabled considerable improvements in the performance of power devices compared to traditional silicon technology, resulting in more efficient and highly compact power converters. GaN power technology has rapidly developed and is expected to gain a significant market share in an increasing number of applications in the coming years. However, despite the great progress, the performance of current GaN devices is still far from what the GaN material could potentially offer, and a significant reduction of the device on-resistance for a certain blocking voltage is needed. Conventional GaN high-electron-mobility-transistors are based on a single two-dimensional electron gas (2DEG) channel, whose trade-off between electron mobility and carrier density limits the minimum achievable sheet resistance. To overcome such limitations, GaN power devices including multiple, vertically stacked 2DEG channels have recently been proposed, showing much-reduced resistances and excellent voltage blocking capabilities for a wide range of voltage classes from 1 to 10 kV. Such devices resulted in unprecedented high-power figures of merit and exceeded the SiC material limit, unveiling the full potential of lateral GaN power devices. This Letter reviews the recent progress of GaN multi-channel power devices and explores the promising perspective of the multi-channel platform for future power devices.

Journal ArticleDOI
TL;DR: In this article , the potential and technical challenges of each approach and presents and discusses their advantages and disadvantages are discussed, as well as the potential of combining GaN and synthetic diamond with high thermal conductivity and electric breakdown strength.
Abstract: Gallium nitride is a wide bandgap semiconductor material with high electric field strength and electron mobility that translate in a tremendous potential for radio-frequency communications and renewable energy generation, amongst other areas. However, due to the particular architecture of GaN high electron mobility transistors, the relatively low thermal conductivity of the material induces the appearance of localized hotspots that degrade the devices performance and compromise their long term reliability. On the search of effective thermal management solutions, the integration of GaN and synthetic diamond with high thermal conductivity and electric breakdown strength shows a tremendous potential. A significant effort has been made in the past few years by both academic and industrial players in the search of a technological process that allows the integration of both materials and the fabrication of high performance and high reliability hybrid devices. Different approaches have been proposed, such as the development of diamond/GaN wafers for further device fabrication or the capping of passivated GaN devices with diamond films. This paper describes in detail the potential and technical challenges of each approach and presents and discusses their advantages and disadvantages.

Journal ArticleDOI
TL;DR: In this article , the design process of a high-frequency wide-range resonant dc/dc converter using gallium nitride HEMTs and silicon carbide diodes is demonstrated in details.
Abstract: Application of wide bandgap power devices enables the power electronics system to achieve higher efficiency, improved power density and reduced weight. Wide range LLC resonant dc/dc converters are extensively applied in multiple scenarios, such as electric vehicle charger and renewable energy generation. In this article, the design process of a high-frequency wide-range LLC resonant dc/dc converter using gallium nitride HEMTs and silicon carbide diodes is demonstrated in details. To increase the operation range, variable dc-link voltage control is utilized and investigated via analyzing the impact of the dc-link voltage on the operation point. The power loss model of the system based on the characterization results is presented and validated via simulation study. A 3.7 kW and 500 kHz experimental prototype is built to verify the proposed design process. The experimental results reveal that variable dc-link voltage control can increase power efficiency of LLC converter in all the operation range.

Journal ArticleDOI
TL;DR: In this article , the authors proposed a high efficiency adaptive method to dynamically adjust the GaN-inverter DT with operating conditions, which can reduce the power loss by 26.7% under full load and 49.14% under light load.
Abstract: Benefited from the fast switching speed, Gallium nitride (GaN) high electron mobility transistors (HEMTs) have been widely used in high switching frequency converters. However, due to the significant correlation between the turn- off time and operating conditions (more than 20 times difference of the turn- off time between the high load current and small load current for GaN HEMTs), using a fixed dead time will introduce extra dead-time (DT) losses in inverters where the output voltage and current are constantly varying. Therefore, this article proposes a high-efficiency adaptive method to dynamically adjust the GaN-inverter DT with operating conditions. An improved transient model including the parasitic inductance and output voltage with bidirectional solution flow has been proposed for GaN HEMTs to increase the accuracy of DT adjustment. Based on this model, the dynamic DT adjustment can be realized without extra sensors for GaN-inverters. Using the dynamic DT adjustment, the experimental results show a peak efficiency of 98.25% in a 1200 W inverter with triangular current mode modulation. Compared with using the fixed DT, the dynamic DT method can reduce the power loss by 26.7% under full load and 49.14% under light load.

Journal ArticleDOI
TL;DR: In this article , a 3 µm thick InN epilayer is grown on (0001) gallium nitride (GaN)/Sapphire template under Inrich conditions with different In/N flux ratios by molecular beam epitaxy.
Abstract: The fabrication of high‐speed electronic and communication devices has rapidly grown the demand for high mobility semiconductors. However, their high cost and complex fabrication process make them less attractive for the consumer market and industrial applications. Indium nitride (InN) can be a potential candidate to fulfill industrial requirements due to simple and low‐cost fabrication process as well as unique electronic properties such as narrow direct bandgap and high electron mobility. In this work, 3 µm thick InN epilayer is grown on (0001) gallium nitride (GaN)/Sapphire template under In‐rich conditions with different In/N flux ratios by molecular beam epitaxy. The sharp InN/GaN interface monolayers with the In‐polar growth are observed, which assure the precise control of the growth parameters. The directly probed electron mobility of 3610 cm2 V‐1 s‐1 is measured with an unintentionally doped electron density of 2.24 × 1017 cm‐3. The screw dislocation and edge dislocation densities are calculated to be 2.56 × 108 and 0.92 × 1010 cm‐2, respectively. The step‐flow growth with the average surface roughness of 0.23 nm for 1 × 1 µm2 is confirmed. The high quality and high mobility InN film make it a potential candidate for high‐speed electronic/optoelectronic devices.