Showing papers on "Gate driver published in 1972"

Dynamic mos ttl compatible

Abstract: The dynamic MOS TTL compatible input voltage level translator has an input terminal for receiving a TTL voltage level for transmission to the gate of a load MOSFET through a transmission gate MOSFET. The gate of the transmission gate MOSFET is connected to a switching bias circuit which turns on the transmission gate MOSFET to transmit the TTL input voltage, and turns off the MOSFET to maintain a voltage comprising the TTL voltage plus a bootstrap voltage at the gate of the load MOSFET. The bootstrap voltage is added through the use of an enhancement capacitor which is connected between the gate and the drain of the MOSFET load device, the drain also being connected to an input for receiving a clock complement signal. A switch MOSFET device has its gate connected through a terminal for receiving a clock signal and has its drain connected at a junction to the source of the load MOSFET device, the junction providing an output signal of a MOS amplitude voltage for application to succeeding MOS stages.

Rf power transistor secondary breakdown protection circuit

Abstract: A protection circuit for RF power transistors to prevent secondary breakdown includes gate means to monitor both the collector current and collector voltage. A gate pulse generated each time the collector voltage exceeds a preset value is used to gate a wave form derived from the transistor collector current. When the current wave form is in phase with the gate pulse and is of sufficient amplitude, the gate means provides a controlled voltage to bias off the transistor power supply for purposes of reducing the output power to safe operating levels.

Tape read amplifier and logic circuit

Abstract: Disclosed is an improved logic gate circuit utilizing a flipflop as a gating element to ineffectuate a noise portion of an input signal. A flip-flop and a gate circuit are responsive to the same input signals, and the flip-flop generates in response thereto a gating input signal to the logic gate to thereby gate out regions of possible noise. The improved logic gate is advantageously utilized in a high speed tape-read amplifier circuit providing both high and low level noise rejection in the NRZ mode.

Ac power control apparatus with demand responsive driver circuit

Abstract: AC power control apparatus with reduced power dissipation is provided wherein a three terminal semiconductor switch, such as a thyristor, has a demand responsive gate driver circuit that includes means to sense the voltage across the main terminals of the switch and a means responsive thereto to form a conduction path to the gate terminal only during periods when the main terminal voltage reaches a threshold value.

Combination emitter follower digital line driver/sensor

Abstract: A combined digital line driver and sensor for both transmitting and receiving digital control signals between a plurality of stations over a single conductor. Each station includes an emitter follower which acts as a fraction of an OR gate for driving the digital control signal over the transmission line. The transmission line is connected to one input of a two-diode AND gate. The other input to the AND gate is connected to the input of the emitter follower via an inverter amplifier. The output of the AND gate will contain the received control signal transmitted from some other station unless the associated station is also transmitting a control signal.

'Zero' decay analogue store using guarded gate MOSFETs

Abstract: An analogue store technique, which uses a guarded gate m.o.s.f.e.t. amplifier assembly and a novel bipolar transistor switching scheme, permits the simultaneous attainment of an acquisition time limited by amplifier slewing rate and a mean 'hold' decay rate of only 170μ V/s for a 10 pF storage capacitor.