Showing papers on "Gate driver published in 1989"

Insulated gate bipolar transistor power module

Abstract: A power module contains IGBT die along with integrated circuit driver chips and opto isolators or isolation transformers within the same module housing. Output terminals are provided which can be interfaced directly to control logic or microprocessors for operating the module. The IGBTs may have current-sensing electrodes to simplify current measurement and control functions.

Lossless gate driver circuit for a high frequency converter

Abstract: A high efficiency gate driver circuit for driving a power switching device of a high frequency converter includes a series resonant circuit for making resonant transfers of energy between the input capacitance of the power switching device and a storage capacitor to achieve substantially lossless gate switching. An ac switch couples the resonant circuit to the junction between upper and lower switching devices connected in a half-bridge configuration. The upper and lower switches of the half-bridge function to maintain the power switching device in either an ON-state or an OFF-state, respectively, depending on the transfer of energy being made. Timing circuitry ensures proper gating of the switching devices relative to operation of the ac switch.

A new concept for a non punch through IGBT with MOSFET like switching characteristics

Abstract: An IGBT (insulated-gate bipolar transistor) is presented which is based on bulk silicon material without a buffer layer. In contrast to other devices the carrier lifetime was kept as high as possible. It is shown that such a device with a breakdown voltage of 1400 V and a short-circuit capability of 1200 V at 20 V gate voltage has on-state and switching losses that are not higher-maybe even lower- than those of a buffer layer device if its backside p-emitter efficiency is kept low enough. >

Josephson modified variable threshold logic gates for use in ultra-high-speed LSI

Abstract: A gate family called modified variable threshold logic (MVTL) is proposed. The OR gate is a two-junction interferometer with one magnetically coupled control line. Magnetic coupling and current injection are used to switch the logic state of the gate. By optimizing the gate parameters, an operating margin of +or-43% and a switching speed of 2.5 ps/gate are obtained. the gate area is 30 mu m*24 mu m with a 1.5- mu m minimum junction diameter. The gate family consists of an OR gate, a single-junction AND gate, and a timed inverter (TI) that consists of the OR gate, a junction, and resistors. The delay time of the gate operated in the actual circuit was found to be less than 10 ps. Circuits having up to 1000 gates, the critical path model of a 16-bit*16-bit multiplier, and a 16-bit arithmetic logic unit have been successfully operated. When the Josephson gate is operated with three-phase power, it is possible to construct any sequential circuit without the complex latch circuit required to prevent the race condition for one- or two-phase power supplies. >

Drive circuit for an insulated gate transistor having overcurrent detecting and adjusting circuits

Abstract: An ON holding circuit is provided which outputs a signal which identifies an ON state of an insulated gate transistor to a gate voltage input circuit, and inhibits the gate voltage input circuit from being responsive to an input signal which identifies an OFF state of the insulated gate transistor when an overcurrent adjusting circuit operates continuously.

The effects of MOSFET output capacitance in high frequency applications

Abstract: In high-frequency power converters (those with switching frequencies >200 kHz) losses associated with charging and discharging the MOSFET's output capacitance begin to affect system efficiency. It is noted that knowing these losses improves predictions of the frequency at which zero-voltage-switched resonant topologies become more efficient than zero-current-switched converters or related square-wave devices. Ways to estimate these losses are shown. Emphasis is placed on determining the losses due to C/sub dg/, since they are especially troublesome to calculate. It is observed that the concept of gate charge greatly improved the understanding of the MOSFET's input characteristics, and there is some benefit to applying similar charge concepts to the output capacitances. A quick summary of gate charge concepts lays the foundation for an in-depth look at how gate charge data and losses due to C/sub dg/ are related. >

Distributive nature of gate current and negative transconductance in heterostructure field-effect transistors

Abstract: Experimental data showing that the dependence of the gate current on the drain voltage in enhancement-mode heterostructure field-effect transistors changes qualitatively when the gate voltage is varied from below to above threshold are presented. The data lead to the conclusion that for gate voltages higher than the threshold voltage and drain voltages larger than the drain saturation voltage, most of the potential drop occurs in a small region near the drain end of the channel. The gate current is distributed along the channel so that electrons in the channel are diverted toward the gate. A model is proposed that takes into account such a distribution of the gate current along the channel. The distributive nature of the gate current leads to negative transconductance in heterostructure field-effect transistors at high gate voltages. Negative transconductance reaching -125 mS/mm in 1- mu m gate devices is observed, and an equivalent circuit model is proposed that describes the dependence of the drain current on the gate voltage in good agreement with present experimental data. >

Tube sound solid-state amplifier

Abstract: A closed loop bipolar transistor driver is coupled to an open loop MOSFET output stage. The closed loop driver amplifier operates within a higher voltage range than the open loop MOSFET output amplifier. The closed loop driver stage is capable of driving the MOSFET output stage into saturation and the MOSFET output stage thereby produces a desirable vacuum tube-like sound characterized by warm, even harmonics. Feedback is used to maintain the closed loop driver circuit in a linear operating regime thereby preventing undesirable hard clipping associated with bipolar transistors when they are overdriven.

High efficiency gate driver circuit for a high frequency converter

Abstract: A high efficiency gate driver circuit for driving a power switching device of a high frequency power converter utilizes a series resonant circuit to reduce or substantially eliminate turn-on switching losses. The resonant circuit comprises the input capacitance of the power switching device and an inductance connected in series between the upper and lower switching devices of a half-bridge driver circuit. During device turn-on, the input capacitance resonates up to a voltage level approximately twice that of the gate drive power supply, and turn-on is substantially lossless. The input capacitance is prevented from discharging back to the supply by a Schottky diode connected in series between the supply and the upper switching device of the half-bridge. During device turn-off, the input capacitance discharges through the lower switching device.

Driving/protecting circuit for power device

Abstract: PURPOSE: To eliminate the need for a reverse bias and to allow respective power source to be unitary by turning a gate emitter to low impedance at the time of turning off a power device in a driving circuit. CONSTITUTION: An input signal VIN from a microcomputer 1 is inputted to the driving circuit 2 and a turning-off circuit 11 through a pulse-by-pulse type latch circuit 10 and connected from the circuit 2 to the gate G of an IGBT 3 through gate resistor 4 as a power device. At the time of turning off the input signal, the gate G of the IGBT 3 is short-circuited to the ground (emitter potential of the IGBT 3) by the circuit 11 in the low impedance state. Consequently, the need for the reverse bias can be eliminated and the whole driving/ protecting circuit can be operated only by one power source. COPYRIGHT: (C)1991,JPO&Japio

Differential amplifier with controllable power consumption

Abstract: The differential amplifier has two n-channel or p-channel field effect transistors serving as controllable current sources which supply auxiliary currents upon appearance of an input signal which amplify the quiescent current. The inputs of the differential amplifier are connected to the gate terminals of the n-channel or p-channel field effect transistors via a level-converting circuit for converting the d.c. component of the input signal superimposed on a gate bias voltage to a lower or, respectively, higher output level. As a result of the control of the current sources proceeding from the amplifier input good driver qualities, a distortion-free signal transmission and a lower dissipation power are guaranteed.

High-frequency heating apparatus including ringing effect suppressor for switching element

Abstract: In an inverter type high frequency heating apparatus such as an electromagnetic cooker and a microwave oven, an insulated gate bipolar transistor is employed as a switching element. A parallel circuit arranged by a capacitor and a resistor is interposed between a gate electrode of the gate insulated bipolar transistor and a gate driver circuit so as to prevent a power loss, or ringing effect when the gate insulated bipolar transistor is turned off.

MOSFET flyback converter

Abstract: In a flyback converter, a 15 Amp N-channel power MOSFET is driven to saturation by a gate voltage derived by connecting the gate to the relatively high-magnitude (150 volt) B+ voltage by way of a resistor of relatively high resistance (about 20 kilo-Ohm). Current flowing through this resistor causes the gate capacitance (3600 pico-Farad) to charge at a rate of about 2 Volt per micro-second. Since the forward transconductance of the MOSFET is 6 mhos or more, a situation has been established where the MOSFET is effectively fully switched ON as long as the MOSFET's drain current does not rise at a rate higher than about 12 Amp per micro-second. Eventually, the magnitude of the gate voltage reaches a predetermined maximum level (about 20 Volt), at which point a threshold device, which is connected between gate and source, breaks down and rapidly discharges the base capacitance, thereby rapidly switching the MOSFET into a non-conducting state. An ordinary bi-polar control transistor is also connected between gate and source, and this control transistor is made conductive by a small current from a secondary winding on the flyback inductor. This control transistor makes the threshold device de-latch and also keeps the gate shorted to the source for as long as the flyback inductor is in the process of discharging its energy.

Floating gate transistor

Abstract: A floating gate transistor is programmed by a conventional charge pump providing drain programming current, typically held below about 1 µA. The drain current can be limited by connecting a resistor between the source and ground, or by limiting the transistor control gate voltage. Instead, a charge pump is coupled to the drain while the control gate is repetitively pulsed. Each time the control gate is pulsed, the transistor turns on, and although the drain is initially discharged through the transistor, some hot electrons are accelerated onto the floating gate, and eventually the floating gate is programmed. The erase gate voltage may be raised to enhance programming efficiency.

Current variation reduction for mosfet current sources

Abstract: A current variation reduction circuit for metal oxide semiconductor field effect transistors, which are controlled by the application of a drive voltage between the gate and drain terminals, includes a circuit for applying a compensation current to the gate terminal. The compensation current is of substantially equivalent magnitude and opposite polarity to current in the source to gate capacitance of the MOSFET in response to a change in the source to drain voltage of the MOSFET.

Method and apparatus for operating motorized gate upon loss of electrical power thereto

Abstract: A backup gate controller for a motorized gate detects the loss of power to the gate and causes the gate motor to open the gate in response to loss of power or by an external trigger thereafter. The backup gate controller may be inserted between an existing gate controller and gate motor to bypass the existing controller when power loss is detected. Alternatively, the backup gate controller may be directly connected to the existing gate controller to cause the existing controller to open the gate when power loss is detected. A combined gate controller/backup controller may also be provided. Upon opening the gate, the backup controller and/or the gate controller may prevent the gate from being closed. The backup controller is battery powered and preferably includes a battery charger.

TTL output driver gate configuration

Abstract: A TTl output driver gate configuration which has reduced voltage spikes on internal power supply potential and ground potential nodes includes a P-channel pull-up transistor (P1), an N-channel pull-down transistor (N1), a NAND logic gate (14), a NOR logic gate (16), a first positive feedback amplifier circuit (18), and a second positive feedback amplifier circuit (20). The pull-up transistor (P1) and the pull-down transistor (N1) have gates which are made serpentine. The reduction of voltage spikes is achieved by slowing down the turn-on times of the pull-up and pull-down transistors during transitions due to the distributed resistances and capacitances of the polysilicon material used to form the serpentine gates thereof. The first and second positive feedback amplifier circuits (18, 20) are used to pull the undriven gate ends of the respective transistors all the way to negative and positive supply potentials so as to facilitate transitions at an output node.

A drive circuit for an insulated gate transistor; and its use in a switching circuit, a current switching apparatus and an induction motor system

Abstract: An ON holding circuit (21-24) is provided which outputs a signal which identifies the ON state of an insulated gate transistor (10) to a gate voltage input circuit (1-9), and inhibits the gate voltage input circuit (1-9) from being responsive to the input signal which identifies the OFF state of the insulated gate transistor (10) when the adjusting operates continuously.

Smartdiscretes, new products for automotive applications

Abstract: Device structures and characteristics for three Smartdiscretes which have automotive applications are presented. Smartdiscretes are discrete power devices which incorporate a few small signal devices on a chip without added process complexity. The first is a power MOSFET with very low on-resistance and an integral temperature sensor. The second is an ignition coil driver with a temperature-compensated clamp. The third is a device with a built-in current limit, electrostatic discharge (ESD) protection, and a temperature-compensated clamp that is suitable for driving small inductive loads such as injector drivers. >

Ka-band monolithic GaAs two-stage power amplifier

Abstract: The development of a Ka-band monolithic GaAs two-stage power amplifier with 3.6-mm total gate width is presented. The monolithic amplifier uses FETs with 1.2-mm and 2.4-mm gate widths for the first-stage and second-stage devices, respectively. It delivers an output power of 0.56 W, with a power gain of 7.2 dB, and a power-added efficiency of 15% at 28 GHz. Output power of more than 0.5 W is obtained over 27.5-28.5 GHz, with power gain exceeding 5 dB. The authors expect that further improvements in output power will be achieved through drain current optimization and a monolithic parallel combining of amplifiers. >

Frequency stable digitally controlled driver circuit

Abstract: A stable digitally controlled driver circuit having an output stage with two series-coupled transistors of opposite conductivity type. The driver circuit operates as an analog amplifier with a digitally controlled output stage. The digital control is provided by control transistors which selectively alternately couple a gate of each transistor in the output stage to the output of a differential amplifier. An output signal of the driver circuit is fed back to the input of the differential amplifier to provide a voltage gain determined by the feedback configuration. When both of the series-coupled transistors in the output stage are made nonconductive, the driver circuit's output is in a high impedance state thereby providing a three-state output.

MOS analog NOR amplifier and current source therefor

Abstract: A MOS (preferably CMOS type) analog NOR amplifier suitable for use in building a programmable array logic (PAL) or the like, or for other usages. The analog NOR amplifier consists of a reference MOS transistor and first pull-up means at one branch and a plurality of input MOS transistors and second pull-up means at another branch with a constant current source connected to the source terminals of these MOS transistors, which forms a configuration similar to a differential amplifier. With the gate terminals of the plurality of input MOS transistors as logic input ends, the drain terminals of the same will act as the output end of a standard NOR gate and the drain terminal of the reference MOS transistor will behave as the output end of a standard OR gate. On account of the differential amplifier stucture, the MOS analog NOR amplifier will not generate current spikes when in logic transient transition and the amplifier gain can be kept low thereby acquiring a low output impedance to further improve the logic transient response. Furthermore, a constant current source is provided to be utilized in the MOS analog NOR amplifier, whereby the Miller capacitance of the amplifier will be maintained at almost zero so that a high speed but costeffective NOR gate is achievable.

Dual-slope wave generator circuit

Abstract: The dual-slope wave generator circuit without DC path and with reduced layout area comprises a pull-up and a pull-down transistor (M5, M6), a transfer gate (B) and an inverter (A). An input signal (IN) is applied to the pull-up transistor, to the gates of the MOS transistors (M1, M2) which form the inverter (A), and to the drain terminals of the MOS transistors (M3, M4) which form the transfer gate (B). A common node of the inverter is connected to the gate of an NMOS transistor of the transfer gate. The source terminals of the transistors (M3, M4) are connected to the gate of the pull-down transistor. An output signal (OUT) is applied to the gate of the transistor (M4) and fed back.

Controlling method for dc/dc converter

Abstract: PURPOSE:To reduce a switching loss by decreasing the frequency of an alternating current output from power converting means of power source side corresponding to a decrease in a power source voltage. CONSTITUTION:A DC power supplied from a DC power source 2 in which its voltage is varied is converted by an inverter 3 composed of MOSFET into an alternating current, which is applied by a rectifier 5 by insulating it by a transformer 4, again converted to a DC power, and then supplied to a load 6. In this case, a voltage detector 11 for detecting the voltage of the power source 2, a function generator 12 operating upon reception of the output of the detector, a frequency converter 13, a frequency controller 14 and a gate driver 15 are provided, and the output AC frequency of the inverter 3 is varied. This frequency is so controlled as to decrease correspondingly to a decrease in the voltage of the power source 2, thereby reducing the switching loss of the inverter 3 and the iron loss or the like of the transformer 4.

Losses of insulated gate bipolar transistor in HF resonant converters

Abstract: The authors investigate the operational limitations of insulated-gate bipolar transistors (IGBTs) in HF resonant converters. The analysis takes into consideration the thermal balance and the maximum current density achieved by the IGBTs in resonant converters. The major resonant subcircuits are described, and the duality rules allowing these circuits to replace other configurations are discussed. A practical circuit is presented, emphasizing driving and protection to achieve the maximum performance of the IGBT in resonant converters. >

Design of a 6-18ghz Monolithic Power Amplifier

Abstract: The design of a 29dBm, 6-18GHz MMIC amplifier chip is described. The chip is a single ended, two-stage reactive/resistive match amplifier with a total gate periphery of 4mm. The design goal is to maximize wideband output power and efficiency on a relatively small die of 100"x.100". Using a load line approach, extensive power calculations were performed in order to minimize the periphery of the driver stage while ensuring saturation of the amplifier.

MOS analog amplifier

Abstract: A MOS (preferably CMOS type) analog NOR amplifier suitable for use in building a programmable array logic (PAL) or the like, or for other uses. The analog NOR amplifier consists of a reference MOS transistor (1) and a first pull-up device (4) at one branch and a plurality of input MOS transistors (2I ... 2N) and a second pull-up device (5) at another branch with a constant current source (3) connected to the source terminals of these MOS transistors, which forms a configuration similar to a differential amplifier. With the gate terminals of the plurality of input MOS transistors (2I ... 2N) as logic input ends, the drain terminals of the same will act as the output end of a standard NOR gate and the drain terminal of the reference MOS transistor (1) will behave as the output end of a standard OR gate. On account of the differential amplifier structure, the MOS analog NOR amplifier will not generate current spikes when in logic transient transition and the amplifier gain can be kept low thereby acquiring a low output impedance to further improve the logic transient response. Furthermore, a constant current source (3) is provided to be utilised in the MOS analog NOR amplifier, whereby the Miller capacitance of the amplifier will be maintained at almost zero so that a high speed but cost effective NOR gate is achievable.

C-mos column decoder with static performance

Abstract: PURPOSE: To simplify a peripheral circuit, and to stabilize a driver by turning into a 0V an unselected input/output gate output by the driving of a main clock without any help by an auxiliary clock. CONSTITUTION: The output end of a main decoder 302 is connected with the gates of a P-MOS transistor T2 and an N-MOS transistor T4 , and a pre-decoding processed clock ϕYi end is connected with the gates of a P-MOS transistor T1 and an N-MOS transistor T3 , and the output of an input/output gate driver 301 operating at an NOR gate drives input/output gates 300 and 303. The NOR gate is constituted of residual pre-decoding processed clocks ϕYj, ϕYk, and ϕY1 and the output of the main decoder 302, and input/output gates 300', 300", 300"', 303', 303", and 303"' in which the outputs of input/output gate drivers 301', 301", 301"' are not selected are turned into 0V. Thus, a peripheral circuit can be simplified, and a driver can be stabilized.

Field effect transistor structure with an isolated gate, and method of production.

Abstract: The invention relates to integrated circuits incorporating field- effect transistors with an insulated gate. To construct the gate (G1, G2) of these transistors, it is proposed to use the superposition of a chromium layer (48) and of a tungsten layer (50) which proves to be particularly well suited to solving not only the general problem of the electrical conductivity of the gate used as conductive element, but also the specific problems of the gates employed as transistor control elements. These problems are in particular the physio-chemical compatibility between the gate material and the gate insulation which is very thin and must not be impaired, and also the possibility of obtaining adequate threshold voltages for p channel and n channel transistors without channel dopings harmful to correct operation (especially in CMOS technology).