Gate driver

About: Gate driver is a research topic. Over the lifetime, 7532 publications have been published within this topic receiving 75854 citations.

An IGBT Gate Driver for Feed-Forward Control of Turn-on Losses and Reverse Recovery Current

Abstract: This paper addresses the problem of turn on performances of an insulated gate bipolar transistor (IGBT) that works in hard switching conditions. The IGBT turn on dynamics with an inductive load is described, and corresponding IGBT turn on losses and reverse recovery current of the associated freewheeling diode are analysed. A new IGBT gate driver based on feed-forward control of the gate emitter voltage is presented in the paper. In contrast to the widely used conventional gate drivers, which have no capability for switching dynamics optimisation, the proposed gate driver provides robust and simple control and optimization of the reverse recovery current and turn on losses. The collector current slope and reverse recovery current are controlled by means of the gate emitter voltage control in feed-forward manner. In addition the collector emitter voltage slope is controlled during the voltage falling phase by means of inherent increase of the gate current. Therefore, the collector emitter voltage tail and the total turn on losses are significantly reduced. The proposed gate driver was experimentally verified and compared to a conventional gate driver, and the results are presented and discussed in the paper.

A Novel Active Gate Driver for Improving SiC MOSFET Switching Trajectory

Abstract: The trend in power electronic applications is to reach higher power density and higher efficiency. Currently, the wide band-gap devices such as silicon carbide MOSFET (SiC MOSFET) are of great interest because they can work at higher switching frequency with low losses. The increase of the switching speed in power devices leads to high power density systems. However, this can generate problems such as overshoots, oscillations, additional losses, and electromagnetic interference (EMI). In this paper, a novel active gate driver (AGD) for improving the SiC MOSFET switching trajectory with high performance is presented. The AGD is an open-loop control system and its principle is based on gate energy decrease with a gate resistance increment during the Miller plateau effect on gate–source voltage. The proposed AGD has been designed and validated through experimental tests for high-frequency operation. Moreover, an EMI discussion and a performance analysis were realized for the AGD. The results show that the AGD can reduce the overshoots, oscillations, and losses without compromising the EMI. In addition, the AGD can control the turn-on and turn-off transitions separately, and it is suitable for working with asymmetrical supplies required by SiC MOSFETs.

Display device and driving method thereof

Abstract: A disclosed display device includes a display panel with data lines and gate lines, the gate lines including odd-numbered gate lines and even-numbered gate lines The display device also includes a timing controller to generate a gate output enable signal, and a gate output enable signal division circuit to extract odd-numbered high logic periods of the gate output enable signal to output a first gate output enable signal and to extract even-numbered high logic periods of the gate output enable signal to output a second gate output enable signal The display device further includes a gate driver to supply a first gate pulse to an odd-numbered gate line in response to the first gate output enable signal and a second gate pulse to an even-numbered gate line in response to the second output enable signal

A Current Source Gate Driver Achieving Switching Loss Savings and Gate Energy Recovery at 1-MHz

Abstract: In this paper, a new current source gate drive circuit is proposed for power MOSFETs. The proposed circuit achieves quick turn on and turn off transition times to reduce switching loss and conduction loss in power MOSFETs. In addition, it can recover a portion of the CV gate energy normally dissipated in a conventional driver. The circuit consists of four controlled switches and a small inductor (typically 100 nH or less). The current through the inductor is discontinuous in order to minimize circulating current conduction loss. This also allows the driver to operate effectively over a wide range of duty cycles with constant peak current-a significant advantage for many applications since turn on and turn off times do not vary with the operating point. Experimental results are presented for the proposed driver operating in a boost converter at 1 MHz, 5 V input, 10 V/5 A output. At 5 V gate drive, a 2.9% efficiency improvement is achieved representing a loss savings of 24.8% in comparison to a conventional driver.

A 120°C ambient temperature forced air-cooled normally-off SiC JFET automotive inverter system

Abstract: The degree of integration of power electronic converters in current hybrid electric vehicles can be increased by mitigation of special requirements of these converters, especially those regarding ambient air and cooling fluid temperature levels. Today, converters have their own cooling circuit or are placed far away from hot spots caused by the internal combustion engine and its peripheral components. In this paper, it is shown, how the use of SiC power semiconductors and active control electronics cooling employing a Peltier cooler can help to build an air-cooled inverter system for 120 °C ambient temperature. First, a detailed analysis shows, how the optimum junction of this high-temperature system can be calculated. Then, the operating temperature ranges of power semiconductors, thermal interface materials, capacitors, and control electronics are investigated, leading to a comprehensive analysis of mechanical concepts for the inverter system in order to show new ways to solve electrical and thermal tradeoffs. In particular, the operation of the signal electronics and the gate driver for power semiconductors with a junction temperature of 250 °C within the specified operating temperature range is ensured by appropriate placement and cooling methods, while taking the electrical requirements for limits on the wiring inductances and symmetry requirements into account. The analysis includes an accurate thermal model of the converter and an optimized active cooling of the signal electronics using a Peltier cooler. Finally, a hardware prototype with discrete power semiconductor devices and thus with a junction temperature limit of 175 °C driving high-speed electrical machines is shown to validate the theoretical considerations in a custom-designed high-temperature test environment.