Gate driver

About: Gate driver is a research topic. Over the lifetime, 7532 publications have been published within this topic receiving 75854 citations.

On-line estimation of IGBT junction temperature using on-state voltage drop

Abstract: In this paper, a noninvasive and accurate on-line estimation method for IGBT junction temperature is proposed. To optimize the heat management of IGBTs, it provides accurate information about junction temperature. The proposed method requires a few additional passive circuit components for the estimation and it can be easily incorporated into the conventional gate driver circuit. The proposed method consists of two processes, one is off-line characterization of the IGBT under test and the other one is on-line estimation of junction temperature based on the characterized data. The simulation and experimental results confirm the validity of the proposed estimation method.

Active Gate-Driver With dv/dt Controller for Dynamic Voltage Balancing in Series-Connected SiC MOSFETs

Abstract: Series connection of individual semiconductors is an effective way to achieve higher voltage switches. However, the inherent unequal dynamic voltage sharing problem needs to be solved, even when well-matched gate drivers and semiconductors are used. A majority of the existing voltage balancing schemes are developed for slow-switching silicon (Si)-based semiconductors, and are also associated with a significant amount of additional losses in the control circuit or on the switches. In this paper, a novel method is proposed for balancing the dynamic voltages among series-connected silicon carbide (SiC) MOSFETs with high dv/dt rates. The method takes advantage of a small capacitor to provide additional current to the gate of the MOSFETs at turn- off , meaning the switching speed (and thus, the device voltage after turn- off ) is controlled. The proposed method generates negligible losses in the control circuit, and also does not significantly increase the switching losses of the semiconductors. Experimental results are provided to prove the effectiveness of the proposed voltage balancing scheme on two SiC MOSFETs inside a module connected in series. In order to do so, an active gate driver is designed embedding the active dv/dt control scheme as well as other essential functionalities needed for operation of SiC MOSFETs.

IGBT Junction Temperature Measurement via Peak Gate Current

Abstract: An electrical method for junction temperature measurement of MOS-gated power semiconductor devices is presented. The measurement method involves detecting the peak voltage over the external gate resistor of an insulated-gate bipolar transistor or mosfet during turn-on. This voltage is directly proportional to the peak gate current, and fluctuates with temperature due to the temperature-dependent resistance of the internal gate resistance. Primary advantages of the method include an immunity to load current variation, and a good linear relationship with temperature. A measurement circuit can be integrated into a gate driver with no disruption to operation and allows autonomous measurements controlled directly via the gate signal. Advantages and disadvantages of the method are discussed.

Liquid crystal display device and method of driving the same

Abstract: A liquid crystal display device includes a timing controller generating a voltage compensation control pulse and a gate control signal, a voltage compensation signal generator generating a voltage compensation signal, the voltage level of which is gradually reduced during one frame period, in response to the voltage compensation control pulse, a power unit outputting a gate-on voltage to a plurality of gate lines by gradually increasing the level of the gate-on voltage in response to the voltage compensation signal, and a gate driver sequentially supplying the gate-on voltage to the plurality of gate lines in response to the gate control signal.

Intelligent, isolated half-bridge power module

Abstract: A power module having at least one power transistor. Each power transistor is coupled to and protected by an overvoltage clamp and desaturation detection circuit. An output current measurement system is coupled to the power module output. A junction temperature sensor is coupled to each power transistor. An isolation transformer is associated with each power transistor, the primary windings of which are connected to an isolated driver communications interface which converts logic signals to primary winding drive signals. An isolated gate driver is coupled to the secondary winding of each isolation transformer and the gate terminal of each power transistor.