Gate driver

About: Gate driver is a research topic. Over the lifetime, 7532 publications have been published within this topic receiving 75854 citations.

A 4kV/120A SiC Solid-State DC Circuit Breaker Powered by a Load-independent IPT System

Abstract: This paper introduces a 4kV/120A solid-state DC circuit breaker (DCCB) based on discrete SiC MOSFETs. The DCCB is designed in a 5-layer tower structure. Each layer consists of a circular main conduction branch and an attached gate driver. There are two primary benefits in the proposed DCCB. First, it reduces conduction loss with multiple devices in parallel. Second, it achieves an ultrafast response speed with SiC MOSFETs. Moreover, the gate drivers of the DCCB are powered by a domino inductive power transfer (IPT) system. It achieves the load-independent constant-voltage output characteristics, which means the outputs are immune to load variations. An IPT system prototype is implemented to test the power transfer performance. At 500kHz frequency, the total output power reaches 15.73W that is sufficient to power on 5 gate drivers, with a peak transfer efficiency of 75.4%. The IPT system is tested to power a 4kV/120A DCCB prototype. It validates that the DCCB is effective to turn off 120A current within 3.5s.

Highly Reliable Depletion-Mode a-IGZO TFT Gate Driver Circuits for High-Frequency Display Applications Under Light Illumination

Abstract: We proposed and fabricated a depletion-mode amorphous indium-gallium-zinc-oxide thin-film transistor gate driver without any additional signals. The proposed gate driver successfully exhibited a high-voltage output pulse without distortion at a clock frequency of 100 kHz, which is enough to drive a high-frequency panel with a frame rate of ~360 Hz and a resolution of full high definition. The experimental and simulation results showed that the gate driver would be highly reliable under light illumination. Also, the output waveform of the gate driver was not distorted after 240-h driving under 450-nm illumination with an intensity of 1 mW/ cm2 at 60°C.

Test-facilitating circuit and testing method

Abstract: A test-facilitating circuit comprises a circuit of superior level in hierarchy constructed by connecting the circuit modules and taking out external nodes from predetermined circuit modules, an interposed gate provided for the input-output portions of each circuit module, an input gate an an output gate provided for a wiring between the interposed gates, with the mutual wiring as one of their ends, a device which connects the input terminal of an input gate to the input external node of the circuit module that does not belong to the circuit modules on the output side of the mutual wiring, a device which connects the output terminal of an output gate to the output external node of the circuit module that does not belong to the circuit modules on the input side of the mutual wiring, and a rewritable memory device provided for the control terminal of each interposed gate, input gate, and output gate. The test of a circuit module is carried out by selectively activating the interposed gate, input gate, and output gate that belong to the same circuit module, and by making use of the external nodes of other circuit modules connected to the external nodes and the input gate and the output gate that belong to the circuit module.

Snubberless balancement of series connected insulated gate devices by a novel gate control strategy

Abstract: The series connection of insulated gate devices, such as MOSFETs or IGBTs, is increasingly used in high-voltage power converters where the demand for fast power switches is growing. The main problem in such an application is to guarantee the voltage balance across the devices both at steady-state and during switching transients, in order to avoid damaging overvoltages. In this paper, a novel approach is used to balance the voltage during switching transients by controlling the charge profile of the input gate capacitance. The main advantages of the proposed method consist in avoiding the common use of balancing capacitors in the output power side, and in working on the gate drive signals only. The application of the proposed gate drive technique is discussed first and then validated by experimental tests applied to the control of two series connected devices (MOSFETs or IGBTs). The proposed approach is also applicable for more than two devices. In particular, the validity has been proven by computer simulations for three components. Finally, a comparison is performed between the switching behaviors of two different configurations: a high-voltage application having for a high-voltage single switch device; or a series of two lower voltage rated devices. The advantage of the latter configuration, having the proposed active voltage balancing, over the former has been experimentally demonstrated with regard to the turn-off power losses.