Topic
Gate driver
About: Gate driver is a research topic. Over the lifetime, 7532 publications have been published within this topic receiving 75854 citations.
Papers published on a yearly basis
Papers
More filters
••
01 Oct 2017TL;DR: In this paper, a 1.2kV SiC half bridge power module utilizing 80μm flexible epoxy-resin as substrates instead of traditional Direct-bonded Copper, for better thermal-stress management and lower cost.
Abstract: To take full advantages of Wide Bandgap power semiconductor devices, breakthroughs on power module development are heavily explored nowadays. This paper introduces a 1.2kV SiC half bridge intelligent power module utilizing 80μm flexible epoxy-resin as substrates instead of traditional Direct-bonded Copper, for better thermal-stress management and lower cost. The investigation on the flexible epoxy-resin material indicates that it has low leakage current even at 250 °C, and high thermal conductivity up to 8 W/mK. No bonding wires are applied in the half bridge power module, instead, double-side solderable SiC MOSFET and diodes are fabricated and utilized for low parasitics and double-side cooling function. To further decrease the entire parasitic inductance on the power loop, a “Stack Structure” is proposed in this work to vertically connect highside and lowside switches with lower interconnection path than traditional power module technology. Simulation indicates that the parasitic inductance on the power loop is less than 1.5 nH. More functionality is achieved by integrating the main power stage with gate driver circuits. Digital isolations are also included in the half bridge module, together with a Low Dropout regulator to eliminate the numbers of auxiliary power supply required by the power module. The size of the entire module is about 35mm × 15mm ×7mm. Electrical simulations and measurements, including leakage current, parasitic extractions, device characteristics, verified that the designed module can work properly with no degradation on the SiC devices, with 12ns turn-off and 48ns turn-on at 800V bus voltage, and 0.63 mJ, 0.23 mJ as turn-on and turn-off loss, respectively.
25 citations
•
01 Apr 1982TL;DR: In this article, a MOSFET-gated bipolar transistor and thyristor integrated devices combining, as the respective turn-on and turn-off control devices, an enhancement mode MOS-FET and a depletion mode MMSFET are connected to a single device gate terminal.
Abstract: MOSFET-gated bipolar transistor and thyristor integrated devices combining, as the respective turn-on and turn-off control devices, an enhancement mode MOSFET and a depletion mode MOSFET. The gates of the two MOSFETs are connected to a single device gate terminal. The conduction channel of the depletion mode MOSFET is preferably an implanted region. With gate voltage of appropriate polarity applied, the depletion mode MOSFET is non-conducting and the enhancement mode MOSFET is conducting, biasing the included bipolar transistor or thyristor into conduction. With zero gate voltage applied, the depletion mode MOSFET conducts and the enhancement mode MOSFET is non-conducting, turning off the included bipolar transistor or thyristor. Significantly, only a single polarity gate input signal is required.
25 citations
•
21 Sep 2011TL;DR: In this paper, a gate driver includes a gate integrated circuit (IC) chip which receives at least two scanning start signals and at least four clock control signals, and outputs a plurality of gate-on voltages.
Abstract: A gate driver includes a gate integrated circuit (“IC”) chip which receives at least two scanning start signals and at least four clock control signals, and outputs a plurality of gate-on voltages, where at least two clock control signals of the at least four clock control signals are generated based on one scanning start signal of the at least two scanning start signals, timings of the at least two scanning start signals are independent of each other, and timings of the at least two clock control signals based on the one scanning start signal are independent of each other.
25 citations
•
06 Feb 2006TL;DR: In this article, a gate driver includes a shift register part and an output control part, which sequentially shifts a first pulse signal in response to a clock to output a second pulse signal.
Abstract: A gate driver includes a shift register part and an output control part. The shift register part sequentially shifts a first pulse signal in response to a clock to output a second pulse signal. The output control part converts the second pulse signal based on a first control signal to output a main pulse signal to a main gate line, and converts the second pulse signal in response to the first control signal and a second control signal to output a sub pulse signal having an adjusted output timing and an adjusted pulse width to a sub gate line. Thus, a liquid crystal display device having the gate driver may improve display quality thereof and reduce a size thereof.
25 citations
••
29 Oct 2015
TL;DR: In this paper, a low cost gate driver of a SiC MOSFET with a passive triggered auxiliary transistor in a phase-leg configuration is proposed, which uses a simple voltage dividing circuit to generate a negative gate-source voltage and a series capacitor to suppress negative voltage spikes.
Abstract: This paper proposes a low cost gate driver of Silicon Carbide (SiC) MOSFET with a passive triggered auxiliary transistor in a phase-leg configuration. Silicon Carbide MOSFET can work on high blocking voltage and high switching frequency with less temperature drift. However, high switching speed may amplify the negative influence of parasitic components and produce significant voltage spikes during switching transient. Therefore, eliminating the spikes of gate-source voltage in a phase-leg configuration plays an important role in providing the safe driving and low switching losses. The proposed gate driver uses a simple voltage dividing circuit to generate a negative gate-source voltage and a passive triggered transistor with a series capacitor to suppress negative voltage spikes, which could satisfy the stringent requirements of high switching SiC MOSFETs with low cost and less complexity. The performance of proposed gate driver is evaluated by simulation and experimental results.
25 citations