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Gate driver

About: Gate driver is a research topic. Over the lifetime, 7532 publications have been published within this topic receiving 75854 citations.


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Patent
03 Nov 1994
TL;DR: In this paper, a circuit and method for reducing a gate voltage of a transmission gate to prevent overvoltage that could damage or affect reliability of the transmission gate is presented, where the gate resides in a charge pump circuit coupled to a capacitor for generating a voltage greater than a power supply voltage.
Abstract: A circuit and method for reducing a gate voltage of a transmission gate to prevent overvoltage that could damage or affect reliability of the transmission gate. The transmission gate resides in a charge pump circuit (41) coupled to a capacitor for generating a voltage greater than a power supply voltage. A buffer (44,45) receives a control signal and couples to a gate terminal of the transmission gate. The buffer (44,45) includes a power supply terminal that is coupled to a variable voltage reference (43). The variable voltage reference (43) provides a voltage that reduces the gate voltage of the transmission gate when an output voltage of the charge pump circuit reaches a predetermined voltage. The variable voltage reference (43) reduces a voltage range between logic levels provided by the buffer (44,45) to protect the transmission gate from an excessive voltage.

24 citations

Patent
20 Feb 2003
TL;DR: In this article, an active snubber is coupled across a synchronous rectifier having a first synchronous MOSFET coupled to a transformer in a power converter and a gate driver is composed of an auxiliary winding, a capacitor, and a resistor, wherein the auxiliary winding and the capacitor are connected in series and then coupled across the resistor in parallel.
Abstract: The invention relates to an active snubber for synchronous rectifier. The active snubber is coupled across a synchronous rectifier having a first synchronous MOSFET and a second synchronous MOSFET coupled to a transformer in a power converter. The active snubber includes a series-coupled active switch and first snubber capacitor which is coupled between a drain terminal and a source terminal of the first synchronous MOSFET, a gate driver operative to keep the active switch conducting a specified period of time during a non-conduction interval of the first synchronous MOSFET. The gate driver is composed of an auxiliary winding, a capacitor, and a resistor, wherein the auxiliary winding and the capacitor are connected in series and then coupled across the resistor in parallel, which is coupled between a gate and a source of the active switch.

24 citations

Proceedings ArticleDOI
01 Oct 2017
TL;DR: In this paper, active gate driving is shown to permit faster switching, whilst still suppressing crosstalk, in a GaN FET bridge-leg converter, which is carried out using two 6.7GHz active gate drivers that can dynamically vary their output resistance from 0.12 Ω to 64 Ω every 150 ps during the sub-10ns switching transients.
Abstract: With switching transients as fast as 100 V/ns and a low threshold voltage of 1–2 V, GaN FETs in bridge-leg topologies are potentially vulnerable to crosstalk and the resultant unwanted partial turn-on, noise interference, and increased losses. Constant-strength gate drivers for GaN FETs limit switching speed to suppress crosstalk. In this work, active gate driving is shown to permit faster switching, whilst still suppressing crosstalk. This is demonstrated in a GaN FET bridge-leg converter. The control device transients are shaped to reduce crosstalk, whilst the synchronous device's gate impedance is actively varied to increase its immunity to crosstalk. This is carried out using two 6.7-GHz active gate drivers that can dynamically vary their output resistance from 0.12 Ω to 64 Ω every 150 ps during the sub-10-ns switching transients. It is demonstrated that unwanted turn-on is suppressed without incurring undershoot and oscillation in the gate, that negative spurious gate voltages can be greatly reduced, and that oscillations in the transient drain current are damped, without incurring additional loss.

24 citations

Journal ArticleDOI
TL;DR: In this paper, an ultracompact GaN 3 × 3 matrix power converter with drive-by-microwave (DBM) technology is described, which comprises a radio frequency (RF)-triggered GaN-gate injection transistor (GIT) bidirectional power switches integration chip with co-integrated RF rectifiers, novel isolated dividing couplers in a printed circuit board to reduce complicated gate lines, and low-consumption GaN/Si DBM gate driver on a chip that controls nine bi-directional Power switches.
Abstract: This paper describes an ultracompact GaN 3 × 3 matrix power converter with drive-by-microwave (DBM) technology, which comprises a radio frequency (RF)-triggered GaN-gate injection transistor (GIT) bidirectional power switches integration chip with co-integrated RF rectifiers, novel isolated dividing couplers in a printed circuit board to reduce complicated gate lines, and low-consumption GaN/Si DBM gate driver on a chip that controls nine bi-directional power switches. The proposed 4.0-kW GaN 3 × 3 matrix power converter is extremely compact, measuring only 18 × 25 mm due to the use of GaN-GIT power device integration technology and DBM technology that provides isolated gate signals by microwave wireless power transmission and eliminates the need for photo-couplers and isolated power supplies. The GaN/Si DBM driver realizes low power consumption of only 2.0 W as a result of gate power sharing with three RF oscillators. The sequential switching operation by the fabricated GaN 3 × 3 matrix converter was successfully achieved.

24 citations

Journal ArticleDOI
O. Ishikawa1, H. Esaki
TL;DR: In this article, a vertical double-diffused MOSFET (VD-MOSFet) capable of delivering output power of 100 W at 900 MHz has been developed, which offers the gain of 8 dB and the drain efficiency of 45 percent.
Abstract: A new vertical double-diffused MOSFET (VD-MOSFET) capable of delivering output power of 100 W at 900 MHz has been developed. It offers the gain of 8 dB and the drain efficiency of 45 percent. The double diffusion self-aligned to the gate allows the devices to control the formation of the submicrometer channel essential for the high transconductance, hence the high gain, with minimum gate-to-source capacitance (C gs ). The device utilizes MoSi 2 for both gate electrodes and shield plates imbedded beneath the CVD oxide in the gate pad region. Low resistivity gate reduces the extra power dissipation to drive the gate, while the shield plate lowers the gate-to-drain capacitance (C gd ) to half. A maximum output power has been realized by the 12 blocks of VD-MOSFET's. They are mounted on the two BeO plates packaged with internal input matching circuits, and the power is measured in a push-pull amplifier.

24 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202351
202297
2021235
2020372
2019425
2018449