Gate driver

About: Gate driver is a research topic. Over the lifetime, 7532 publications have been published within this topic receiving 75854 citations.

Dielectrically isolated power IC

Abstract: A power IC having at least a level shifter for changing the level of an input signal, a high-side driver circuit for driving a predetermined load in accordance with a level changed by the level shifter, the high-side driver circuit being in a floating state, and a reverse current preventing diode for disconnecting a current path from the ground of the level shifter to the reference potential of the high-side driver circuit. The high-side driver circuit and reverse current preventing diode are respectively dielectrically isolated by a dielectric member to prevent insufficient element isolation to be caused by bias conditions. The predetermined reference potential to be connected to an inductive load or the like in the high-side driver circuit can be set to a negative potential. The electrical energy stored in the inductive load or the like can be extracted out and attenuated at high speed via the reference potential set to the negative potential to thereby realize a high speed operation.

Watt-level non-uniform distributed 6–37 GHz power amplifier MMIC with dual-gate driver stage in GaN technology

Abstract: This paper reports on a wide bandwidth monolithic power amplifier suitable for wide bandwidth applications up to the Ka-band such as electronic warfare systems. The MMIC is based on a 100nm AlGaN/GaN T-gate HEMT microstrip transmission line technology with an f T > 80 GHz. The designed and fabricated amplifier uses the non-uniform distributed power amplifier topology and covers a frequency range from 6GHz to 37 GHz, whereas the lower band edge is limited by the on-chip DC bias network. The MMIC is a dual-stage topology which employs dual-gate HEMTs in the driver stage in order to boost the gain of the overall amplifier. The measured S 21 is (17 ± 1) dB. This is a significant increase of 3 dB as compared to a driver stage using standard common-source HEMTs. An output power well beyond 1W over the entire frequency range is obtained. To the authors' knowledge, this is the highest output power achieved by a distributed amplifier at this frequency range.

Driving circuit of liquid crystal display device

Abstract: PROBLEM TO BE SOLVED: To realize a driving circuit of a liquid crystal display device, which prevents shift of a threshold voltage in an output transistor in a register circuit which a shift register constituting a gate driver for driving the liquid crystal display device has. SOLUTION: A set of a transistor M6 and a capacitor C2 drops voltage applied to a gate of an output transistor M1 for driving the liquid crystal display device, to a negative bias voltage during a turning-off period of the output transistor M1. COPYRIGHT: (C)2006,JPO&NCIPI

Compensated dual injector driver

Abstract: A compensated dual injector driver circuit for controlling the current to either of a pair of electromagnetic solenoid fuel injectors is disclosed. The driver circuit includes a pair of analog bilateral switches operably connected to the control terminals of two driver transistors whose power terminals are coupled serially with the coils of the injector solenoids. A driver amplifier generating a current control signal for the driver transistors is connected to a common input of the two switches. Either of the switches is selected for closure by a logical input from a select line thereby choosing the individual injector to be energized. The driver amplifier in response to the leading edge of a control pulse regulates the conductance of the selected transistor with the current control signal to initially draw current through the injector coil until it reaches a peak value. At the time the peak current is attained, the driver amplifier then switches the control current to a holding value. The peak and the holding current levels are measured by a negative feedback loop from a sense resistor commonly connected in series with each set of coils and driver transistors to indicate the magnitude of current therethrough. The circuit further includes a means for controllably collapsing the magnetic field stored in the injector coils when the injector driver transistors are turned off in response to the trailing edge of the control pulse. Compensation is provided to the driver amplifier for altering the hold level current in accordance with variations in the battery voltage. The differing levels of hold current with changing battery voltage will modify the closing time of the injector oppositely to those changes produced in the opening times by the battery voltage.

High stability static memory device having metal-oxide semiconductor field-effect transistors

Abstract: A static memory device has memory cells each having a pair of driver MOSFETs, two load resistors each connected between a power source and a drain of each of the driver MOSFETs, two access MOSFETs each of which is connected between the drain of each of the driver MOSFETs and each of bit lines and gates of which are connected to a word line. In the memory cell, the thickness of a gate oxide film of the access MOSFET is made thicker than that of the gate oxide film of the driver MOSFET. The operation stability of the memory cell is enhanced, without the need of increasing a chip size, by increasing a ratio between the driver MOSFETs and the access MOSFETs of the memory cell (the ratio of current supplying capabilities of the two transistors) without making a gate size large or without making it so small as to cause process variations.