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Gate driver

About: Gate driver is a research topic. Over the lifetime, 7532 publications have been published within this topic receiving 75854 citations.


Papers
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Proceedings ArticleDOI
01 Nov 2015
TL;DR: In this paper, the requirements a driver has to fulfil to switch SiC-MOSFETs at their maximum switching speed and shows how it is done in practical applications.
Abstract: Low conduction losses are one technical advantage of SiC-MOSFETs compared to conventional IGBTs but this benefit is generally not enough to justify the much higher wafer costs per mm2. The other very important advantage is the lower switching losses. A conventional power module design with externally connected gate drivers cannot even get into the region of what SiC-MOSFETs are capable to perform. One reason are high parasitic inductances caused by the module design (gate and drain-source inductance) but another reason is the very sensitive gate structure of today's SiC-MOSFETs compared to Si-switches. This abstract reveals the requirements a driver has to fulfil to switch SiC-MOSFETs at their maximum switching speed and shows how it is done in practical applications. Differences in the gate behavior of SiC-MOSFETs and Si-competitors are illustrated. Practical solutions are depicted and evaluated for different applications.

22 citations

Patent
27 Jun 2007
TL;DR: In this paper, a gate driver includes several first and second circuit units, each of which includes a signal output unit for outputting the driving signal and a shift register unit for start signal to a next circuit unit.
Abstract: A gate driver includes several first and second circuit units outputting first and second driving signals to odd and even gate lines, respectively, and each of the first circuit units or the second circuit units includes a signal output unit for outputting the driving signal and a shift register unit for outputting a start signal to a next circuit unit. A driving method is also disclosed.

22 citations

Journal ArticleDOI
TL;DR: In this article, a low-temperature polycrystalline silicon (LTPS) integrated driver circuits are proposed for low-cost chip-on-glass (COG) panel.
Abstract: P-type low-temperature polycrystalline silicon (LTPS) thin-film transistor (TFT) integrated driver circuits are proposed for low-cost chip-on-glass (COG) panel. In order to reduce the process cost of panel, gate driver employing level-shifter, shift register and DC–DC converter is integrated by p-type polycrystalline silicon (poly-Si) TFTs. The gate drivers are composed of the level-up and level-down voltage shifters and the robust two-clock shift registers. The DC–DC converters are designed using diode-connected type charge pumps and regulators. The proposed p-type circuits were verified successfully by the simulations and the measurements.

22 citations

Patent
Chung-Jr Jan1, Che-Li Lin1
14 Jul 2006
TL;DR: In this paper, a display driving apparatus and a multi-line inversion driving method thereof are provided, which includes a gate driver, a source driver, gate enabling unit and a line polarity signal unit.
Abstract: A display driving apparatus and a multi-line inversion driving method thereof are provided. The apparatus includes a gate driver, a source driver, a gate enabling unit and a line polarity signal unit. Every time after a plurality of scan lines is turned on, the source driver inverts the polarity of the sub pixel driving signal according to a line polarity signal output by the line polarity signal unit. Thereby, the polarity inversion operating frequency of the sub pixel driving signal is lowered to reduce the power consumption of the source driver.

22 citations

Proceedings ArticleDOI
Qi Zhou1, Feng Gao1
20 Mar 2016
TL;DR: In this paper, a gate driver for SiC MOSFETs is proposed to attenuate the negative voltage spikes in a bridge circuit, which adopts a simple voltage dividing circuit to generate a negative gate-source voltage as traditional and a passive triggered transistor with a series capacitor to suppress the positive voltage spikes.
Abstract: SiC MOSFET has low on-state resistance and can work on high switching frequency, high voltage and some other tough conditions with less temperature drift, which could provide the significant improvement of power density in power converters. However, for the bridge circuit in an actual converter, high dv/dt during fast switching transient of one MOSFET will amplify the negative influence of parasitic components and produce significant voltage spikes on the complementary MOSFET, which will threaten its safe operation. This paper proposes a new gate driver circuit for SiC MOSFET to attenuate the negative voltage spikes in a bridge circuit. The proposed gate driver adopts a simple voltage dividing circuit to generate a negative gate-source voltage as traditional and a passive triggered transistor with a series capacitor to suppress the negative voltage spikes, which could satisfy the stringent requirements of fast switching SiC MOSFETs under high dc voltage condition with low cost and less complexity. An analysis is presented in this paper based on the simulation and experimental results with the performance comparison evaluated.

22 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202351
202297
2021235
2020372
2019425
2018449