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Gate driver

About: Gate driver is a research topic. Over the lifetime, 7532 publications have been published within this topic receiving 75854 citations.


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Journal ArticleDOI
10 Dec 2002
TL;DR: In this article, an electrothermal physics-based model for the FS IGBT is developed, which contains a detailed description of the FS layer and it is validated using experimental results for a commercial 1200-V/60-A FD IGBT over the entire temperature range specified in the data sheets.
Abstract: The high-voltage field-stop (FS) insulated gate bipolar transistor (IGBT) is a promising power device for high-power applications thanks to the robust characteristics offered by the FS technology, which combines the inherent advantages offered by punch-through and nonpunch-through structures while overcoming the drawbacks of each structure. In this paper, an electrothermal physics-based model for the FS IGBT is developed. The model contains a detailed description of the FS layer and it is validated using experimental results for a commercial 1200-V/60-A FS IGBT over the entire temperature range specified in the data sheets. The validated model is then used to simulate a 6.5-kV FS IGBT. The simulation results are compared with experimental results published in the literature and good agreement is obtained.

84 citations

Journal ArticleDOI
TL;DR: In this paper, a closed-loop IGBT gate driver using simple passive feedback was proposed to optimize the tradeoff between switching losses, switching delay times, reverse recovery current of the freewheeling diode, turnoff overvoltage, and EMI.
Abstract: This paper proposes a new concept for attaining a defined switching behavior of insulated-gate bipolar transistors (IGBTs) at inductive load (hard) switching, which is a key prerequisite for optimizing the switching behavior in terms of switching losses and electromagnetic interference (EMI). First, state-of-the-art gate driver concepts that enable a control of the IGBT's switching transients are reviewed. Thereafter, a highly dynamic closed-loop IGBT gate driver using simple passive ${\rm d}i_{\rm C}/{\rm d}t$ and ${\rm d}v_{\rm CE}/{\rm d}t$ feedbacks and employing a single analog PI-controller is proposed. Contrary to conventional passive gate drivers, this concept enables an individual control of the current and voltage slopes largely independent of the specific parameters or nonlinearities of the IGBT. Accordingly, a means for optimizing the tradeoff between switching losses, switching delay times, reverse recovery current of the freewheeling diode, turn-off overvoltage, and EMI is gained. The operating principle of the new gate driver is described and based on derived control oriented models of the IGBT, a stability analysis of the closed-loop control is carried out for different IGBT modules. Finally, the proposed concept is experimentally verified for different IGBT modules and compared to a conventional resistive gate driver.

83 citations

Journal ArticleDOI
TL;DR: In this article, a gate driver for the reverse blocking insulated gate bipolar transistor (RB IGBT) was proposed to optimize the reverse recovery current and turn-on losses, and the proposed gate driver was experimentally verified and the results presented and discussed.
Abstract: Turn-on performance of a reverse blocking insulated gate bipolar transistor (RB IGBT) is discussed in this paper. The RB IGBT is a specially designed IGBT having ability to sustain blocking voltage of both the polarities. Such a switch shows superior conduction but much worst switching (turn- on) performances compared to a combination of an ordinary IGBT and blocking diode. Because of that, optimization of the switching performance is a key issue that makes the RB IGB not well accepted in the real applications. In this paper, the RB IGBT turn-on losses and reverse recovery current are analyzed for different gate driver techniques, and a new gate driver is proposed. Commonly used conventional gate drivers do not have capability for the switching dynamics optimization. In contrast to this, the new proposed gate driver provides robust and simple way to control and optimize the reverse recovery current and turn-on losses. The collector current slope and reverse recovery current are controlled by the means of the gate emitter voltage control in feedforward manner. In addition, the collector emitter voltage slope is controlled during the voltage falling phase by the means of inherent increase of the gate current. Therefore, the collector emitter voltage tail and the total turn- on losses are reduced, independently on the reverse recovery current. The proposed gate driver was experimentally verified and the results presented and discussed.

82 citations

Journal ArticleDOI
TL;DR: In this paper, an active gate drive circuit for series-connected insulated gate bipolar transistors (IGBTs) with voltage balancing in high-voltage applications is described. But, the circuit is not suitable for high-power applications.
Abstract: This paper describes an active gate drive circuit for series-connected insulated gate bipolar transistors (IGBTs) with voltage balancing in high-voltage applications. The gate drive circuit not only amplifies the gate signal, but also actively limits the overvoltage during switching transients, while minimizing the switching transients and losses. In order to achieve the control objective, an analog closed-loop control scheme is adopted. The closed-loop control injects current to an IGBT gate as required to limit the IGBT collector-emitter voltage to a predefined level. The performance of the gate drive circuit is examined experimentally by the series connection of three IGBTs with conventional snubber circuits. The experimental results show the voltage balancing by an active control with wide variations in loads and imbalance conditions.

81 citations

Journal ArticleDOI
TL;DR: An automatic optimization by simulated annealing algorithm is introduced to fully utilize the benefit of the gate driver, and the further reduction of IC overshoot and the energy loss are achieved over the manual optimization.
Abstract: A general-purpose clocked gate driver integrated circuit (IC) to generate an arbitrary gate waveform is proposed to provide a universal platform for fine-grained gate waveform optimization handling various power transistors. The fabricated IC with a 0.18 μm Bipolar-CMOS-DMOS process has 63 P-type MOS (PMOS) and 63 N-type MOS (NMOS) driver transistors on a chip whose activation patterns are controlled by 6-bit digital signals and 40 ns time step control. In the 500 V switching measurements with a manual gate waveform optimization, the proposed gate driver reduces the IC overshoot by 25% and 41%, and the energy loss by 38% and 55% for Si-insulated-gate bipolar transistor and SiC-MOSFET, respectively, which demonstrate the feasibility of driving various power devices with the same driver. An automatic optimization by simulated annealing algorithm is introduced to fully utilize the benefit of the gate driver, and the further reduction of IC overshoot by 26% and the energy loss by 18% are achieved over the manual optimization.

81 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202351
202297
2021235
2020372
2019425
2018449