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Gate driver

About: Gate driver is a research topic. Over the lifetime, 7532 publications have been published within this topic receiving 75854 citations.


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Proceedings ArticleDOI
27 Sep 2004
TL;DR: In this article, different gate-drivers, represented by three fundamental gate-driver topologies that are evaluated in terms of suitable operating conditions, construction and losses, also form part of the evaluation.
Abstract: The gate-driver in most power electronic converters is seldom given sufficient attention during the design stage even though it is the circuit exposed to much of the same voltage stresses as the switching devices and yet despite this, is a crucial component to a sound functioning system. At higher switching frequencies, and either low power or high voltage applications, the effect of the gate-driver on the overall converter performance becomes even more pronounced. When considering a gate-driver for a power electronic system, the converter topology, operating conditions and requirements, voltage and current ratings, and switching frequency determines the suitability and applicability of a chosen gate-driver to the application. This paper discusses different gate-drivers, represented by three fundamental gate-driver topologies that are evaluated in terms of suitable operating conditions, construction and losses. These gate-drivers, constructed using two different methods, a hybrid and SMD, also forms part of the evaluation. In addition, some of the issues as switching frequencies keep increasing is also addressed.

65 citations

Journal ArticleDOI
TL;DR: The flip-chip on flex IPEM (FCOF-IPEM) as mentioned in this paper was proposed to improve the reliability of 3D integrated power electronics modules (IPEMs) by using triple-stacked solder bump metallurgy.
Abstract: We have extended the concept of flip-chip technology, which is widely used in IC packaging, to the packaging of three-dimensional (3-D) integrated power electronics modules (IPEMs). We call this new approach flip-chip on flex IPEM (FCOF-IPEM), because the power devices are flip-chip bonded to a flexible substrate with control circuits. We have developed a novel triple-stacked solder bump metallurgy for improved and reliable device interconnections. In this multilayer structure, we have carefully selected packaging materials that distribute the thermo-mechanical stresses caused by mismatching coefficients of thermal expansion (CTEs) among silicon chips and substrates. We have demonstrated the feasibility of this packaging approach by constructing modules with two insulated gate bipolar transistors (IGBTs), two diodes, and a simple gate driver circuit. Fabricated FCOF-IPEMs have been successfully tested at power levels up to 10 kW. This paper presents the materials and reliability issues in the package design along with electrical, mechanical, and thermal test results for a packaged IPEM.

65 citations

Patent
07 May 1997
TL;DR: In this article, an N-channel power MOSFET (M2) is fabricated with its source and body connected together and biased at a positive voltage with respect to its drain.
Abstract: An N-channel power MOSFET (M2) is fabricated with its source and body connected together and biased at a positive voltage with respect to its drain. The gate is controlled by a switch (1184) which alternatively connects the gate to the source or to a voltage (VCP) which turns the channel of the MOSFET fully on. When the gate is connected to the source, the device functions as a 'pseudo-Schottky' diode which turns on at a lower voltage and provides a lower-resistance path than a conventional PN diode. When the gate is connected to the positive voltage the channel of the MOSFET is turned fully on. This MOSFET switch is particularly suitable as a synchronous rectifier in a power converter where it reduces the power loss and stored charge in the 'break before make' interval.

65 citations

Journal ArticleDOI
TL;DR: In this paper, a resonant gate driver is presented for improvement of efficiency at light-to-medium load conditions gate power losses that are a main contributor to total losses are reduced thanks to energy recovery.
Abstract: High switching frequency dc-dc converters are present in many applications where wide regulation bandwidth and high efficiency are needed A resonant gate driver is presented for improvement of efficiency at light-to-medium load conditions Gate power losses that are a main contributor to total losses are reduced thanks to energy recovery A testchip designed in 025- BiCMOS shows as much as a 30% decrease in power losses compared to a conventional driver at 200-MHz switching frequency The proposed resonant gate driver is fully integrated with its inductor unlike earlier works The limitation in the reduction of gate losses is detailed and confirmed experimentally

65 citations

Proceedings ArticleDOI
G. Miller1, J. Sack1
26 Jun 1989
TL;DR: In this paper, an IGBT (insulated-gate bipolar transistor) is presented which is based on bulk silicon material without a buffer layer and it is shown that such a device with a breakdown voltage of 1400 V and a short-circuit capability of 1200 V at 20 V gate voltage has on-state and switching losses that are not higher-maybe even lower-than those of a buffer-layer device if its backside p-emitter efficiency is kept low enough.
Abstract: An IGBT (insulated-gate bipolar transistor) is presented which is based on bulk silicon material without a buffer layer. In contrast to other devices the carrier lifetime was kept as high as possible. It is shown that such a device with a breakdown voltage of 1400 V and a short-circuit capability of 1200 V at 20 V gate voltage has on-state and switching losses that are not higher-maybe even lower- than those of a buffer layer device if its backside p-emitter efficiency is kept low enough. >

64 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202351
202297
2021235
2020372
2019425
2018449