Gate driver

About: Gate driver is a research topic. Over the lifetime, 7532 publications have been published within this topic receiving 75854 citations.

Reduction of Power Electronic Components in Multilevel Converters Using New Switched Capacitor-Diode Structure

Abstract: In this paper, a new structure for symmetric and cascade multilevel converter is presented This structure requires the least power electronic components, gate driver circuits, power diode, and dc voltage source The number of output levels is high Reduction of the number of power electronic switches against voltage levels is an important factor in multilevel converters due to safety in switches, circuit size, cost, installation area, and complexity in control To maximize the number of output level in the proposed optimized structure in order to attain different goals, such as reduction of stress on switches, the result of comparing the proposed structure and other structures present The proposed method is robust against the switching faults in multilevel converter for dc source and the equipment The simulation and experimental results presented in this paper show the performance of the proposed method

Gate driver unit for electrical switching device

Abstract: An exemplary apparatus and method for using intelligent gate driver units with distributed intelligence to control antiparallel power modules or parallel-connected electrical switching devices like IGBTs is disclosed. The intelligent gate drive units use the intelligence to balance the currents of the switching devices, even in dynamic switching events. The intelligent gate driver units can use master-slave or daisy chain control structures and instantaneous or time integral differences of the currents of parallel-connected switching devices as control parameters. Instead of balancing the currents, temperature can also be balanced with the intelligent gate driver units.

Power MOS device with asymmetrical channel structure for enhanced linear operation capability

Abstract: A power MOSFET type device, which can include an IGBT or other VDMOS device having similar forward transfer characteristics, is formed with an asymmetrical channel, to produce different gate threshold voltage characteristics in different parts of the device. The different gate threshold voltage characteristics can be achieved either by different source region doping concentrations or different body region doping concentrations subjacent the gate oxide, or by asymmetrical gate oxide thicknesses. The portion of overall channel affected can be 50% or such other proportion as the designer chooses, to reduce the zero temperature coefficient point of the device and improve its Safe Operating Area in linear operation, while retaining low conduction loss. Multiple power MOSFET devices with asymmetrical channels can easily be used safely in parallel linear power amplifier circuits.

A Tri-Slope Gate Driving GaN DC–DC Converter With Spurious Noise Compression and Ringing Suppression for Automotive Applications

Abstract: Targeting on electromagnetic interference (EMI) regulation and ringing suppression issues in automotive applications, this paper presents a gallium nitride (GaN)-based dc–dc converter operating at 10 MHz. A spurious noise compression technique compresses and re-distributes spurious switching noise within a defined frequency sideband, achieving EMI noise reduction at main switching frequency and its harmonics. Meanwhile, a tri-slope gate driver is designed to control voltage and current slew rates of GaN switches for effective ringing suppression, which is adaptive to load and input voltage changes. Tailored for high switching frequency and high-efficiency operation, the dynamic level shifters achieve about 0.8-ns propagation delay and near-zero quiescent current. Fabricated in a 0.35- $\mu$ m Bipolar-CMOS-DMOS process, the converter accomplishes an EMI noise reduction of 40.5 dB $\mu$ V and suppresses $V_{\text {SW}}$ ringing by 79.3%. The converter retains above 60% efficiency over 96.6% of its 6-W power range, with a peak efficiency of 85.5% at 1.5-W load.

Design of Bidirectional and Highly Stable Integrated Hydrogenated Amorphous Silicon Gate Driver Circuits

Abstract: Based on the use of a standard five-mask process, this work presents a new integrated hydrogenated amorphous silicon thin-film transistor (a-Si:H TFT) gate driver circuit for large size TFT-LCD applications, composed of a pull-up circuit with three TFTs, a pull-down circuit with ten TFTs, and two capacitors. The pull-up circuit, which separates the row line from the carry signal, prevents distortion of the output pulse. Moreover, the pull-down circuit with the AC-driving method can reduce the threshold voltage shift ( shift) to stabilize the output voltage and suppress the fluctuation of the row line, subsequently increasing the operating lifetime. According to accelerated lifetime test results, this gate driver circuit operates stably over 240 hours at 100°C. Additionally, the scan direction of the proposed circuit can be modified using two control signals and applied to the reversal display of an image.