Topic
Gate driver
About: Gate driver is a research topic. Over the lifetime, 7532 publications have been published within this topic receiving 75854 citations.
Papers published on a yearly basis
Papers
More filters
•
17 Jul 2014TL;DR: In this paper, a gate driver is defined as a plurality of stages connected to each other in a cascade manner, where each of the stages includes an input unit which connects a first input terminal and a first node and includes a first output transistor and a second input transistor, where an output terminal of the first input transistor and an input terminals of the second output transistor are connected to a second node, and the input unit further includes a storage capacitor which connects the firstinput terminal and the second node.
Abstract: A gate driver includes a plurality of stages connected to each other in a cascade manner, where each of the stages includes an input unit which connects a first input terminal and a first node and includes a first input transistor and a second input transistor, where an output terminal of the first input transistor and an input terminal of the second input transistor are connected to a second node, and the input unit further includes a storage capacitor which connects the first input terminal and the second node.
53 citations
••
20 Mar 2016
TL;DR: In this paper, the gate power supply for medium voltage level applications has been investigated, and several isolation transformer designs have been investigated and optimum design with very low coupling capacitance ≈ 0.5 pF, has been identified and used in the gate driver design.
Abstract: The commercial gate drivers are available upto 6.5 kV IGBTs. With the advances in the SiC, power devices rated beyond 10 kV are being researched. These devices will have use on medium voltage power converters. Commercial gate drivers rated for such high voltages are not available. These power devices have very high dv/dts (30–100 kV/µs) at switching transitions. Such high dv/dts bring in challenges in the gate driver design. The isolation stage of the gate power supply needs to have very low coupling capacitance to limit the high frequency circulating currents from reaching the gate driver control circuits. Also, the isolation stage has to be designed with insulation several times higher than the peak system voltage level. In this paper, design, development and evaluation of the gate power supply for medium voltage level applications have been investigated. Several isolation transformer designs have been investigated and optimum design, with very low coupling capacitance ≈ 0.5 pF, has been identified and used in the gate driver design. Experimental characterization of the transformer has been done. The performance of the gate driver power supply has been evaluated in several MV power converters, using 10 kV SiC MOSFETs.
53 citations
•
07 Jun 2001
TL;DR: In this article, a conductive shield gate is formed near the bottom of a trench MOSFET to reduce the capacitance between the active gate and the drain, thereby improving the ability of the MOSFLET to operate at high frequencies, whether it is operated in a linear range or as a switching device.
Abstract: In a trench MOSFET a conductive shield gate is
formed near the bottom of the trench. The shield gate
is insulated from the overlying active gate and,
depending on the use of the MOSFET, is connected to a
constant voltage, such as ground. The shield gate
reduces the capacitance between the active gate and the
drain, thereby improving the ability of the MOSFET to
operate at high frequencies, whether it is operated in
its linear range or as a switching device.
52 citations
•
15 Oct 2004TL;DR: In this paper, an active matrix display device includes a display panel; a gate driver; and a data driver, where the gate driver includes a plurality of shift registers to output signals that are sequentially shifted.
Abstract: An active matrix display device includes: a display panel; a gate driver; and a data driver, wherein the gate driver includes a plurality of shift registers to output signals that are sequentially shifted, each of the shift registers including: a first control part for controlling a first node in response to a first clock signal; a second control part for controlling second and third nodes in response to the start signal and a second clock signal; and an output part to selectively output one of a third clock signal and a first supply voltage in response to voltages of the first, second, and third nodes, whereby second and third supply voltages, which are different from each other, are switched for application at the second and third nodes
52 citations
••
TL;DR: In this article, a robust control algorithm is developed to adapt the gate current waveforms to the desired switching behavior, irrespective of the operating conditions, and implemented in a field-programmable gate array on the gate unit.
Abstract: Digital technology incorporated into the gate drive unit of high-voltage insulated-gate bipolar transistors (IGBTs) allows new features, like automatic optimization of the gate current waveforms for achieving certain properties of the switching transients or automatic adaptation to the operating conditions. This paper presents a digital gate unit with online measurement of the switching waveforms of an IGBT. Based on this, a robust control algorithm is developed to adapt the gate current waveforms to the desired switching behavior, irrespective of the operating conditions. The algorithm is implemented in a field-programmable gate array on the gate unit and experimentally verified for several optimization objectives using 3.3-kV and 1200-A IGBTs.
52 citations