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Gate driver

About: Gate driver is a research topic. Over the lifetime, 7532 publications have been published within this topic receiving 75854 citations.


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Journal ArticleDOI
TL;DR: In this paper, the authors proposed a filter model for the selection of filter component values for a certain $dv/dt$ requirement, where the stray inductance between the power device and the converter output was used as a filter component in combination with an RC-link.
Abstract: In this paper, a novel $dv/dt$ filter is presented targeted for 100-kW to 1-MW voltage source converters using silicon carbide (SiC) power devices. This concept uses the stray inductance between the power device and the converter output as a filter component in combination with an additional small RC -link. Hence, a lossy, bulky, and costly filter inductor is avoided and the resulting output $dv/dt$ is limited to 5–10 kV/ $\mu$ s independent of the output current and switching speed of the SiC devices. As a consequence, loads with $dv/dt$ constraints, e.g., motor drives can be fed from SiC devices enabling full utilization of their high switching speed. Moreover, a filter-model is proposed for the selection of filter component values for a certain $dv/dt$ requirement. Finally, results are shown using a 300-A 1700-V SiC metal–oxide–semiconductor field-effect transistor ( mosfet ). These results show that the converter output $dv/dt$ can be limited to 7.5 kV/ $\mu$ s even though values up to 47 kV/ $\mu$ s were measured across the SiC mosfet module. Hence, the total switching losses, including the filter losses, are verified to be three times lower compared to when the mosfet $dv/dt$ was slowed down by adjusting the gate driver.

52 citations

Proceedings ArticleDOI
01 Jun 2011
TL;DR: In this article, the static and dynamic characteristics of ultra fast silicon (Si) and SiC Schottky diodes were compared and the mechanism of parasitic high frequency oscillations during turn-off transient was studied.
Abstract: Advanced control systems combined with high speed gate driver circuits enable extremely high rate of change of power devices voltages, up to hundreds of kV/us. Short rise times of power devices could cause significant EMC problems, which are unacceptable in majority of power electronics applications. It is known that voltage variations during diode switch-off depend on how long it takes for the charge stored near the p-n junction to be recovered during voltage reversing. In fast switching applications good forward recovery characteristics are needed. The silicon carbide (SiC) diodes characterize almost zero reverse recovery charge. However the lossless operation in connection with extremely high dv/dt could cause the SiC diodes less effective in damping the voltage ringing. The compromise between high efficiency and low EMI emission is therefore the actual aim of the research. The paper compares the static and dynamic characteristics of ultra fast silicon (Si) and SiC Schottky diodes and presents the study of the mechanism of parasitic high frequency oscillations during turn-off transient.

51 citations

Journal ArticleDOI
TL;DR: A digital hardware emulation of device-level models for the insulated gate bipolar transistor and the power diode on the field programmable gate array (FPGA) features a fully paralleled implementation using an accurate floating-point data representation in VHSIC hardware description language (VHDL) language.
Abstract: Accurate models of power electronic devices are necessary for hardware-in-the-loop (HIL) simulators. This paper proposes a digital hardware emulation of device-level models for the insulated gate bipolar transistor (IGBT) and the power diode on the field programmable gate array (FPGA). The hardware emulation utilizes detailed physics-based nonlinear models for these devices, and features a fully paralleled implementation using an accurate floating-point data representation in VHSIC hardware description language (VHDL) language. A dc-dc buck converter circuit is emulated to validate the hardware IGBT and diode models, and the nonlinear circuit simulation process. The captured oscilloscope results demonstrate high accuracy of the emulator in comparison to the offline simulation of the original system using Saber software.

51 citations

Journal ArticleDOI
TL;DR: In this article, a silicon-on-insulator (SOI)-based high-voltage, high-temperature integrated circuit (IC) gate driver for SiC power FETs has been designed and fabricated using a commercially available 0.8-m, 2-poly and 3-metal bipolar-complementary metal oxide semiconductor (CMOS)-double diffused metal oxide (DMOS) process.
Abstract: Silicon carbide (SiC)-based field effect transistors (FETs) are gaining popularity as switching elements in power electronic circuits designed for high-temperature environments like hybrid electric vehicle, aircraft, well logging, geothermal power generation etc. Like any other power switches, SiC-based power devices also need gate driver circuits to interface them with the logic units. The placement of the gate driver circuit next to the power switch is optimal for minimising system complexity. Successful operation of the gate driver circuit in a harsh environment, especially with minimal or no heat sink and without liquid cooling, can increase the power-to-volume ratio as well as the power-to-weight ratio for power conversion modules such as a DC-DC converter, inverter etc. A silicon-on-insulator (SOI)-based high-voltage, high-temperature integrated circuit (IC) gate driver for SiC power FETs has been designed and fabricated using a commercially available 0.8--m, 2-poly and 3-metal bipolar-complementary metal oxide semiconductor (CMOS)-double diffused metal oxide semiconductor (DMOS) process. The prototype circuit-s maximum gate drive supply can be 40-V with peak 2.3-A sourcing/sinking current driving capability. Owing to the wide driving range, this gate driver IC can be used to drive a wide variety of SiC FET switches (both normally OFF metal oxide semiconductor field effect transistormore » (MOSFET) and normally ON junction field effect transistor (JFET)). The switching frequency is 20-kHz and the duty cycle can be varied from 0 to 100-. The circuit has been successfully tested with SiC power MOSFETs and JFETs without any heat sink and cooling mechanism. During these tests, SiC switches were kept at room temperature and ambient temperature of the driver circuit was increased to 200-C. The circuit underwent numerous temperature cycles with negligible performance degradation.« less

51 citations

Proceedings ArticleDOI
01 Dec 2006
TL;DR: In this paper, the design, operation, characterization and scalability of a 1T SG-MOSFET memory cell with a micro-electro-mechanical gate electrode is described, which uses charging of the gate dielectric by direct contact of the conductive gate with the gate insulator during mechanical pull-in.
Abstract: The design, operation, characterization and scalability of a 1T SG-MOSFET memory cell that combines a MOSFET solid-state device and a Micro-Electro-Mechanical gate electrode, is reported The proposed SG-MOSFET memory uses the charging of the gate dielectric by direct contact of the conductive gate with the gate insulator during mechanical pull-in, which results in I-V hysteresis Very low gate leakage and excellent current ratio in programmed logic states are demonstrated Cycling without significant degradation up to 105 cycles is experimentally shown and the scalability of the cell is explored by simulation

51 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202351
202297
2021235
2020372
2019425
2018449