Gate driver

About: Gate driver is a research topic. Over the lifetime, 7532 publications have been published within this topic receiving 75854 citations.

Resistor in series with bootstrap diode for monolithic gate driver device

Abstract: A power circuit includes at least a high side and low side MOS gated transistor operable to form a bridge circuit across high and low power terminals of a power source; a high side driver circuit having an output operable to change conduction characteristics of the high side MOS gated transistor; and a series coupled diode and capacitor configured in a bootstrap arrangement with the high side and low side transistors to provide an operating voltage to the high side driver circuit. A low side driver circuit has an output operable to change conduction characteristics of the low side MOS gated transistor; a low side voltage source is coupled to the low side driver circuit to provide an operating voltage thereto, the series coupled diode and capacitor being in series with the low side voltage source; and a stray inductance is located in series with the high side and low side MOS gated transistors and inducing a current through the low side MOS gated transistor in response to conduction changes in the high side and low side MOS gated transistors. A first current limiting element is coupled in series between the low side voltage source and the diode to reduce a component of the induced current from the stray inductance from flowing through the diode into the capacitor; and a second current limiting element is operable to be coupled in series between the low power terminal and the low side voltage source to reduce a component of the induced current from the stray inductance from flowing through the diode into the capacitor.

SiC MOSFET gate drive design considerations

Abstract: The purpose of this paper is to provide guidance on how to design gate driver circuits for Silicon Carbide (SiC) MOSFETs. There are new commercially available SiC MOSFETs available in discrete and module packages which are much faster and more efficient than their traditional IGBT counterparts. To take full advantage of these benefits we need to understand the requirements for a new breed of gate drivers that are tailored to meet the unique drive and protection characteristics of SiC MOSFETs. Traditional IGBT based fault protection schemes such as desaturation (desat) detection can be implemented with some modifications to protect SiC MOSFETs. However, due to the higher switching speed of the new SiC devices, it is worth another look at all the design and implementation aspects of a good SiC MOSFET gate driver.

Achieving Zero Switching Loss in Silicon Carbide MOSFET

Abstract: Due to the unipolar conduction mechanism, the switching loss of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor ( mosfet ) is reduced significantly when compared with silicon insulated gate bipolar transistor (IGBT). This enables the use of SiC mosfet in high-frequency application. However, the switching loss could still thermally limit the upper limit of the switching frequency. Further reduction of switching loss of SiC mosfet , therefore, remains an open challenge for higher frequency applications. Based on the in-depth revelation of device physics of the switching process, accurate switching loss model is established which highlights the dependence of the switching loss on the gate driving condition. With extreme fast gate driving condition, several loss limitations can be established. The minimum turn- on loss is the energy stored in the output capacitance and the minimum turn- off loss can approach zero or the so-called zero turn- off loss (ZTL). Furthermore, zero switching loss (ZSL) is achieved when utilizing zero-voltage switching turn- on and ZTL turn- off condition. With ZSL, the upper limit of the switching frequency is no long thermally limited which is verified by co-package experimental demonstration. We believe the trailblazing concepts of SiC mosfet switching loss will provide guiding principles for device innovation, package optimization, gate driver improvement, and current possible solutions toward higher frequency applications.

Driving of data line used to control unit circuit

Abstract: PROBLEM TO BE SOLVED: To reduce driving time of a data line connected to a unit circuit. SOLUTION: A display matrix section 200 has pixel circuits 210 which are arranged in a matrix manner, a plurality of gate lines Y1 and Y2, etc., extended along a row direction and a plurality of data lines X1, X2, etc., extended in a column direction. Scanning lines are connected to a gate driver 300 and data lines are connected to a data line driver 400. A precharge circuit 600 and an added current circuit are provided for each data line as a means to accelerate charging or discharging of the data line. For each data line, the acceleration of charging or discharging is conducted by precharges and added current prior to the completion of the setting of light emitting gradation in the circuit 210.

Power transistor gate driver

Abstract: The present invention relates to a gate driver for a power transistor comprising a first charging path operatively connected between a first voltage supply and a gate terminal of the power transistor for charging the gate terminal to a first gate voltage. A second charging path is connectable between the gate terminal of the power transistor and a second supply voltage to charge the gate terminal from the first gate voltage to a second gate voltage larger or higher than the first gate voltage. A voltage of the second voltage supply is higher than a voltage of the first voltage supply.